Venkateswarlu V Vinjamuri (venkateswarlu.v.vinjamuri@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16558
-gerrit
commit 07c8fc529d08ccb4a3bcd1290eebd9bd13b09d46 Author: Venkateswarlu Vinjamuri venkateswarlu.v.vinjamuri@intel.com Date: Thu Sep 8 16:11:27 2016 -0700
mainboard/google/reef: Enable lpss s0ix
This setting enables lpss to power gate in S0ix.
BUG=chrome-os-partner:53876
Change-Id: I0a0fecb0e2b6e5e2f89ac505dd603f4be1bc161e Signed-off-by: Venkateswarlu Vinjamuri venkateswarlu.v.vinjamuri@intel.com --- src/mainboard/google/reef/variants/baseboard/devicetree.cb | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index e663787..f15260b 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -50,6 +50,9 @@ chip soc/intel/apollolake register "hdaudio_pwr_gate_enable" = "1" register "hdaudio_bios_config_lockdown" = "1"
+ # Enable lpss s0ix + register "lpss_s0ix_enable" = "1" + # GPE configuration # Note that GPE events called out in ASL code rely on this # route, i.e., if this route changes then the affected GPE