Change in coreboot[master]: sb/intel/lynxpoint: Move SATA DevSlp setup to a function

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47033 )

Change subject: sb/intel/lynxpoint: Move SATA DevSlp setup to a function
......................................................................

sb/intel/lynxpoint: Move SATA DevSlp setup to a function

This is just to ease merging with Broadwell later on.

Change-Id: If9a2c6c98aec77718a4319ee24f72f79cd3c6959
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/lynxpoint/sata.c
1 file changed, 35 insertions(+), 29 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/47033/1

diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index 18dbb00..ef7ebcf 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -34,6 +34,39 @@
    pci_write_config32(dev, SATA_SIRD, value | set);
 }

+static void sata_configure_devslp(
+	const struct southbridge_intel_lynxpoint_config *config,
+	const uintptr_t abar)
+{
+	union abar_reg_cap_2 abar_cap_2 = {
+		.raw = abar_read32(abar, ABAR_REG_CAP_2),
+	};
+
+	if (config->sata_devslp_disable) {
+		abar_cap_2.supports_device_sleep = 0;
+		abar_write32(abar, ABAR_REG_CAP_2, abar_cap_2.raw);
+		return;
+	}
+
+	abar_cap_2.auto_partial_to_slumber   = 1;
+	abar_cap_2.supports_device_sleep     = 1;
+	abar_cap_2.aggressive_devslp_mgmt    = 1;
+	abar_cap_2.devslp_entry_slumber_only = 1;
+
+	abar_write32(abar, ABAR_REG_CAP_2, abar_cap_2.raw);
+
+	for (int port = 0; port < 4; port++) {
+		if (!(config->sata_port_map & (1 << port)))
+			continue;
+
+		union abar_reg_px_devslp px_devslp = {
+			.raw = abar_read32(abar, ABAR_REG_PxDEVSLP(port)),
+		};
+		px_devslp.device_sleep_present = 1;
+		abar_write32(abar, ABAR_REG_PxDEVSLP(port), px_devslp.raw);
+	}
+}
+
 static void sata_init(struct device *dev)
 {
    u32 reg32;
@@ -118,35 +151,8 @@

abar_write_ports_implemented(abar, config->sata_port_map);

-	union abar_reg_cap_2 abar_cap_2 = {
-		.raw = abar_read32(abar, ABAR_REG_CAP_2),
-	};
-
-	if (pch_is_lp()) {
-		if (config->sata_devslp_disable) {
-			abar_cap_2.supports_device_sleep = 0;
-
-			abar_write32(abar, ABAR_REG_CAP_2, abar_cap_2.raw);
-		} else {
-			abar_cap_2.auto_partial_to_slumber   = 1;
-			abar_cap_2.supports_device_sleep     = 1;
-			abar_cap_2.aggressive_devslp_mgmt    = 1;
-			abar_cap_2.devslp_entry_slumber_only = 1;
-
-			abar_write32(abar, ABAR_REG_CAP_2, abar_cap_2.raw);
-
-			for (int port = 0; port < 4; port++) {
-				if (!(config->sata_port_map & (1 << port)))
-					continue;
-
-				union abar_reg_px_devslp px_devslp = {
-					.raw = abar_read32(abar, ABAR_REG_PxDEVSLP(port)),
-				};
-				px_devslp.device_sleep_present = 1;
-				abar_write32(abar, ABAR_REG_PxDEVSLP(port), px_devslp.raw);
-			}
-		}
-	}
+	if (pch_is_lp())
+		sata_configure_devslp(config, abar);

/* Set Gen3 Transmitter settings if needed */
    if (config->sata_port0_gen3_tx)

[Angel Pons (Code Review)]

Hello Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47033

to look at the new patch set (#2).

Change subject: sb/intel/lynxpoint: Move SATA DevSlp setup to a function
......................................................................

sb/intel/lynxpoint: Move SATA DevSlp setup to a function

This is just to ease merging with Broadwell later on.

Change-Id: If9a2c6c98aec77718a4319ee24f72f79cd3c6959
Signed-off-by: Angel Pons 
---
M src/southbridge/intel/lynxpoint/sata.c
1 file changed, 35 insertions(+), 29 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/47033/2

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47033 )

Change subject: sb/intel/lynxpoint: Move SATA DevSlp setup to a function
......................................................................

Patch Set 3: Code-Review+2