Attention is currently required from: Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60405 )
Change subject: soc/intel/common/cse: Implement HECI notify ......................................................................
Patch Set 1:
(3 comments)
File src/soc/intel/common/block/cse/cse_eop.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136350): https://review.coreboot.org/c/coreboot/+/60405/comment/ca2963b7_71b9ac79 PS1, Line 203: * BIOS must also ensure that CF9GR is cleared and locked (Bit31 of ETR3) prior to line over 96 characters
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136350): https://review.coreboot.org/c/coreboot/+/60405/comment/a2535098_18cd27bb PS1, Line 234: if (!is_cse_devfn_visible(PCH_DEVFN_CSE)) suspect code indent for conditional statements (8, 24)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-136350): https://review.coreboot.org/c/coreboot/+/60405/comment/3a113e2b_56ba04e1 PS1, Line 252: /* Step 3: If devicetree.cb policy is set to disabled, then hide CSE prior to boot */ line over 96 characters
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