Attention is currently required from: Mario Scheithauer, Uwe Poeche, Werner Zeh.
Hello Mario Scheithauer, Uwe Poeche, Werner Zeh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68743
to look at the new patch set (#2).
Change subject: mb/siemens/mc_apl2: Enable early POST through NC_FPGA ......................................................................
mb/siemens/mc_apl2: Enable early POST through NC_FPGA
Enable early POST code output for this mainboard, using the NC FPGA device on PCIe.
This requires the parent PCI bridge to be initialized early.
BUG=none TEST=boot on siemens/mc_apl2 and observe whether the POST codes coming from before FSP-M init are visible
Change-Id: Ice5fe26e11d0513e6bb0a20f1d8f0483d7b3dc6a Signed-off-by: Jan Samek jan.samek@siemens.com --- M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig M src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc A src/mainboard/siemens/mc_apl1/variants/mc_apl2/post.c 3 files changed, 47 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/68743/2