Attention is currently required from: Arthur Heymans, Eric Lai, Fred Reitberger, Jason Glenesk, Matt DeVillier, Nico Huber, Raul Rangel.
Hello Arthur Heymans, Eric Lai, Fred Reitberger, Jason Glenesk, Matt DeVillier, Nico Huber, Raul Rangel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74843?usp=email
to look at the new patch set (#18).
The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins)
Change subject: soc/amd/common/data_fabric/domain: provide amd_pci_domain_fill_ssdt ......................................................................
soc/amd/common/data_fabric/domain: provide amd_pci_domain_fill_ssdt
Generate the PCI0 _CRS ACPI resource template to tell the OS which PCI bus numbers and IO and MMIO regions can be used for PCI devices below _SB/PCI0. This data corresponds to what amd_pci_domain_scan_bus and amd_pci_domain_read_resources provided to the resource allocator. This makes sure that the PCI0 _CRS ACPI resource template matches the constraints the resource allocator used when allocating resources.
TEST=With also the rest of the current patch train applied, the generated _CRS resource template contains the expected PCI bus numbers and IO and MMIO resources and both Linux and Windows boot on Mandolin.
Signed-off-by: Arthur Heymans arthur@aheymans.xyz Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Iaf6d38a8ef5bb0163c4d1c021bf892c323d9a448 --- M src/soc/amd/common/block/data_fabric/domain.c M src/soc/amd/common/block/include/amdblocks/data_fabric.h 2 files changed, 90 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/74843/18