Attention is currently required from: Jason Glenesk, Raul Rangel, ritul guru, Matt DeVillier, Fred Reitberger.
Hello Jason Glenesk, Raul Rangel, ritul guru, Matt DeVillier, Fred Reitberger,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/72879
to look at the new patch set (#2).
Change subject: soc/amd/mendocino/data_fabric: add Rembrandt DF_MMIO_REG_SET_SIZE ......................................................................
soc/amd/mendocino/data_fabric: add Rembrandt DF_MMIO_REG_SET_SIZE
In contrast to Mendocino and all other AMD SoCs in the coreboot tree, Rembrandt, on which Mendocino is based on, has a DF_MMIO_REG_SET_SIZE of 3 instead of 4, so the next data fabric MMIO register is 3 DWORDs after the last one instead of the 4 DWORDs on the other SoCs. This was checked against PPR #56558 Rev 3.04.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I454ad5d182f0040db93c9b3a83941333392c6061 --- M src/soc/amd/mendocino/include/soc/data_fabric.h 1 file changed, 21 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/72879/2