Change in coreboot[master]: soc/intel/alderlake: Add support for UFS controller

[Meera Ravindranath (Code Review)]

Attention is currently required from: Rizwan Qureshi.
Hello Rizwan Qureshi,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/62856

to review the following change.

Change subject: soc/intel/alderlake: Add support for UFS controller
......................................................................

soc/intel/alderlake: Add support for UFS controller

1) Add UFS controller to chipset.cb and keep it off by default
2) Enable UFS controller 1 UPD in fsp params.

Signed-off-by: Meera Ravindranath 
Signed-off-by: Rizwan Qureshi 
Change-Id: I92f024ded64e1eaef41a7807133361d74b5009d4
---
M src/soc/intel/alderlake/chipset.cb
M src/soc/intel/alderlake/fsp_params.c
2 files changed, 11 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/62856/1

diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb
index 09dc970..caba2c0 100644
--- a/src/soc/intel/alderlake/chipset.cb
+++ b/src/soc/intel/alderlake/chipset.cb
@@ -118,6 +118,7 @@
    	device pci 10.7 alias thc1 off end
    	device pci 12.0 alias ish off end
    	device pci 12.6 alias gspi2 off end
+		device pci 12.7 alias ufs off end
    	device pci 13.0 alias gspi3 off end
    	device pci 14.0 alias xhci off
    		chip drivers/usb/acpi
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index f0e0ac2..f8e6679 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -604,12 +604,22 @@
 static void fill_fsps_storage_params(FSP_S_CONFIG *s_cfg,
    	const struct soc_intel_alderlake_config *config)
 {
+	struct device *dev;
+
 #if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N)
    /* eMMC Configuration */
    s_cfg->ScsEmmcEnabled = is_devfn_enabled(PCH_DEVFN_EMMC);
    if (s_cfg->ScsEmmcEnabled)
    	s_cfg->ScsEmmcHs400Enabled = config->emmc_enable_hs400_mode;
 #endif
+
+	/* UFS */
+	dev = pcidev_path_on_root(PCH_DEVFN_UFS);
+	if (!dev)
+		s_cfg->UfsEnable[1] = 0;
+	else
+		s_cfg->UfsEnable[1] = dev->enabled;
+
    /* Enable Hybrid storage auto detection */
    s_cfg->HybridStorageMode = config->hybrid_storage_mode;
 }