Change in coreboot[master]: mb/google/brya/var/brask: Set PL and PsysPL

[Zhuohao Lee (Code Review)]

Attention is currently required from: David Wu, Alan Huang.
Zhuohao Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59576 )

Change subject: mb/google/brya/var/brask: Set PL and PsysPL
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Patch Set 2:

(2 comments)

File src/mainboard/google/brya/variants/brask/ramstage.c:

https://review.coreboot.org/c/coreboot/+/59576/comment/09326dbe_3551884f 
PS2, Line 41: 13.52A
This looks weird to me. The max current of the typec is 5A. How could this be larger than 5A? IIUC, the typec data should be coming from the EC. The psys_config below is only for the barrel jack.

https://review.coreboot.org/c/coreboot/+/59576/comment/cd8aaae5_62090d2d 
PS2, Line 41: sholud
should