[S] Change in coreboot[main]: soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE

[Yidi Lin (Code Review)]

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85740?usp=email )

Change subject: soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE
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soc/mediatek/mt8196: Define MFGPLL_*_BASE using MFGSYS_BASE

The MFGPLL_*_BASE addresses are based on MFGSYS_BASE (0x40000000)
instead of IO_PHYS (0x10000000). Rewrite the address calculation for
readability.

Also rename these macros to MFG_PLL_* to make them consistent with other
macros to be added in CB:85654.

Change-Id: Ifd5d77b95c698cb6030c58ba259f2cdf2a29d87b
Signed-off-by: Yu-Ping Wu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85740
Reviewed-by: Yidi Lin 
Tested-by: build bot (Jenkins) 
---
M src/soc/mediatek/mt8196/include/soc/addressmap.h
M src/soc/mediatek/mt8196/include/soc/pll.h
2 files changed, 6 insertions(+), 6 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Yidi Lin: Looks good to me, approved

diff --git a/src/soc/mediatek/mt8196/include/soc/addressmap.h b/src/soc/mediatek/mt8196/include/soc/addressmap.h
index 96efa40..8d0a4bb 100644
--- a/src/soc/mediatek/mt8196/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8196/include/soc/addressmap.h
@@ -191,9 +191,9 @@
    OVLSYS1_CONFIG_BASE	= IO_PHYS + 0x22C00000,
    DISP_VDISP_AO_CONFIG_BASE	= IO_PHYS + 0x2E800000,
    EDP_BASE		= IO_PHYS + 0x2EC40000,
-	MFGPLL_PLL_CTRL_BASE	= IO_PHYS + 0x3B810000,
-	MFGPLL_SC0_PLL_CTRL_BASE	= IO_PHYS + 0x3B810400,
-	MFGPLL_SC1_PLL_CTRL_BASE	= IO_PHYS + 0x3B810800,
+	MFG_PLL_PLL_CTRL_BASE		= MFGSYS_BASE + 0x0B810000,
+	MFG_PLL_SC0_PLL_CTRL_BASE	= MFGSYS_BASE + 0x0B810400,
+	MFG_PLL_SC1_PLL_CTRL_BASE	= MFGSYS_BASE + 0x0B810800,
 };

#endif
diff --git a/src/soc/mediatek/mt8196/include/soc/pll.h b/src/soc/mediatek/mt8196/include/soc/pll.h
index 6c4a976..e95434e 100644
--- a/src/soc/mediatek/mt8196/include/soc/pll.h
+++ b/src/soc/mediatek/mt8196/include/soc/pll.h
@@ -50,11 +50,11 @@
 static struct mtk_dispsys_regs *const
    mtk_disp = (void *)DISP_VDISP_AO_CONFIG_BASE;
 static struct mtk_mfgpll_regs *const
-	mtk_mfgpll = (void *)MFGPLL_PLL_CTRL_BASE;
+	mtk_mfgpll = (void *)MFG_PLL_PLL_CTRL_BASE;
 static struct mtk_mfgpll_regs *const
-	mtk_mfgpll_sc0 = (void *)MFGPLL_SC0_PLL_CTRL_BASE;
+	mtk_mfgpll_sc0 = (void *)MFG_PLL_SC0_PLL_CTRL_BASE;
 static struct mtk_mfgpll_regs *const
-	mtk_mfgpll_sc1 = (void *)MFGPLL_SC1_PLL_CTRL_BASE;
+	mtk_mfgpll_sc1 = (void *)MFG_PLL_SC1_PLL_CTRL_BASE;
 static struct mtk_mcupll_regs *const
    mtk_ccipll = (void *)CCIPLL_PLL_CTRL_BASE;
 static struct mtk_mcupll_regs *const