Nick Vaccaro has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76050?usp=email )
Change subject: mb/google/brya/acpi: Don't wait for PG in GPU off sequences ......................................................................
mb/google/brya/acpi: Don't wait for PG in GPU off sequences
When powering rails down, there is no value in waiting for the PG signal to de-assert. Instead, shut the rails off as quickly as possible while maintaining a controlled ordering.
BUG=b:288266850 TEST=build and measured delays are gone Signed-off-by: Tarun Tuli taruntuli@google.com
Change-Id: If31691a7d62b72661fcbacb34e90f3a6adec8134 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76050 Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com Reviewed-by: Nick Vaccaro nvaccaro@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/brya/acpi/power.asl 1 file changed, 3 insertions(+), 11 deletions(-)
Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved Nick Vaccaro: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/acpi/power.asl b/src/mainboard/google/brya/acpi/power.asl index 5638e18..a51bcaa 100644 --- a/src/mainboard/google/brya/acpi/power.asl +++ b/src/mainboard/google/brya/acpi/power.asl @@ -137,7 +137,6 @@
/* Ramp down PEXVDD */ CTXS (GPIO_PEXVDD_PWR_EN) - GPPL (GPIO_PEXVDD_PG, 0, 20) #if CONFIG(BOARD_GOOGLE_AGAH) Sleep (10) #else @@ -146,7 +145,6 @@
/* Deassert EN_PPVAR_GPU_NVVDD */ CTXS (GPIO_NVVDD_PWR_EN) - GPPL (NVPG, 0, 20) Sleep (2)
/* Assert GPU_PERST_L */ @@ -280,40 +278,34 @@ CTXS (GPIO_GPU_ALLRAILS_PG) Sleep (1)
- /* Ramp down FBVDD and let rail discharge to <10% */ + /* Ramp down FBVDD */ #if CONFIG(BOARD_GOOGLE_AGAH) STXS (GPIO_FBVDD_PWR_EN) #else CTXS (GPIO_FBVDD_PWR_EN) #endif - GPPL (GPIO_FBVDD_PG, 0, 20)
/* Ramp down PEXVDD and let rail discharge to <10% */ CTXS (GPIO_PEXVDD_PWR_EN) - GPPL (GPIO_PEXVDD_PG, 0, 20) #if CONFIG(BOARD_GOOGLE_AGAH) Sleep (10) #else Sleep (3) #endif
- /* Ramp down NVVDD and let rail discharge to <10% */ + /* Ramp down NVVDD */ CTXS (GPIO_NVVDD_PWR_EN) - GPPL (NVPG, 0, 20) Sleep (2)
- /* Ramp down NV33 and let rail discharge to <10% */ + /* Ramp down NV33 */ CTXS (GPIO_NV33_PWR_EN) - GPPL (GPIO_NV33_PG, 0, 20) Sleep (4)
/* Ramp down 1.8V */ CTXS (GPEN) - GPPL (GPIO_1V8_PG, 0, 20)
/* Ramp down 1.2V rail on boards with support */ CTXS (GPIO_NV12_PWR_EN) - GPPL (GPIO_NV12_PG, 0, 5)
GCOT = Timer