Mike Banon has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37977 )
Change subject: src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK
Warning: not tested on hardware.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I5464b4ce07643b83f9d948858d3a773edb817aaf --- M src/mainboard/hp/abm/Kconfig M src/mainboard/hp/abm/Kconfig.name M src/mainboard/hp/abm/Makefile.inc A src/mainboard/hp/abm/bootblock.c D src/mainboard/hp/abm/romstage.c 5 files changed, 49 insertions(+), 73 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/37977/1
diff --git a/src/mainboard/hp/abm/Kconfig b/src/mainboard/hp/abm/Kconfig index 907c025..94cb4e1 100644 --- a/src/mainboard/hp/abm/Kconfig +++ b/src/mainboard/hp/abm/Kconfig @@ -21,7 +21,6 @@
config BOARD_SPECIFIC_OPTIONS def_bool y - #select ROMCC_BOOTBLOCK select CPU_AMD_AGESA_FAMILY16_KB select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB select SOUTHBRIDGE_AMD_AGESA_YANGTZE diff --git a/src/mainboard/hp/abm/Kconfig.name b/src/mainboard/hp/abm/Kconfig.name index 27eda0c..4ace573 100644 --- a/src/mainboard/hp/abm/Kconfig.name +++ b/src/mainboard/hp/abm/Kconfig.name @@ -1,2 +1,2 @@ -#config BOARD_HP_ABM -# bool"ABM" +config BOARD_HP_ABM + bool "ABM" diff --git a/src/mainboard/hp/abm/Makefile.inc b/src/mainboard/hp/abm/Makefile.inc index f8895fa..4dde2cf 100644 --- a/src/mainboard/hp/abm/Makefile.inc +++ b/src/mainboard/hp/abm/Makefile.inc @@ -13,6 +13,8 @@ # GNU General Public License for more details. #
+bootblock-y += bootblock.c + romstage-y += buildOpts.c romstage-y += BiosCallOuts.c romstage-y += OemCustomize.c diff --git a/src/mainboard/hp/abm/bootblock.c b/src/mainboard/hp/abm/bootblock.c new file mode 100644 index 0000000..f2771a2 --- /dev/null +++ b/src/mainboard/hp/abm/bootblock.c @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <amdblocks/acpimmio.h> +#include <bootblock_common.h> +#include <superio/nuvoton/common/nuvoton.h> +#include <superio/nuvoton/nct5104d/nct5104d.h> + +#define SERIAL_DEV PNP_DEV(0x4E, NCT5104D_SP4) + +void bootblock_mainboard_early_init(void) +{ + u32 *addr32; + u32 t32; + + /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ + pm_write8(0xea, 0x1); + + /* Set auxiliary output clock frequency on OSCOUT1 pin to be 25MHz */ + /* Set auxiliary output clock frequency on OSCOUT2 pin to be 48MHz */ + addr32 = (u32 *)0xfed80e28; + t32 = *addr32; + t32 &= 0xffc0ffff; // Clr bits [21:19] & [18:16] + t32 |= 0x00010000; // Set bit 16 for 25MHz + *addr32 = t32; + + /* Enable Auxiliary OSCOUT1/OSCOUT2 */ + addr32 = (u32 *)0xfed80e40; + t32 = *addr32; + t32 &= 0xffffff7b; // clear 2, 7 + *addr32 = t32; + + nct5104d_enable_uartd(SERIAL_DEV); + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/hp/abm/romstage.c b/src/mainboard/hp/abm/romstage.c deleted file mode 100644 index d7322c9..0000000 --- a/src/mainboard/hp/abm/romstage.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Advanced Micro Devices, Inc. - * Copyright (C) 2014 Sage Electronic Engineering, LLC - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <arch/io.h> -#include <device/pci_ops.h> -#include <northbridge/amd/agesa/state_machine.h> -#include <southbridge/amd/agesa/hudson/hudson.h> -#include <superio/nuvoton/common/nuvoton.h> -#include <superio/nuvoton/nct5104d/nct5104d.h> - -#define SERIAL_DEV PNP_DEV(0x4E, NCT5104D_SP4) - -void board_BeforeAgesa(struct sysinfo *cb) -{ - u32 *addr32; - u32 t32; - - /* For serial port option, plug-in card on LPC. */ - pci_devfn_t dev = PCI_DEV(0, 0x14, 3); - pci_write_config32(dev, 0x44, 0xff03ffd5); - - /* In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for - * LpcClk[1:0]". To be consistent with Parmer, setting to 4mA - * even though the register is not documented in the Kabini BKDG. - * Otherwise the serial output is bad code. - */ - outb(0xD2, 0xcd6); - outb(0x00, 0xcd7); - - - /* Enable the AcpiMmio space */ - outb(0x24, 0xcd6); - outb(0x01, 0xcd7); - - /* Set auxiliary output clock frequency on OSCOUT1 pin to be 25MHz */ - /* Set auxiliary output clock frequency on OSCOUT2 pin to be 48MHz */ - addr32 = (u32 *)0xfed80e28; - t32 = *addr32; - t32 &= 0xffc0ffff; // Clr bits [21:19] & [18:16] - t32 |= 0x00010000; // Set bit 16 for 25MHz - *addr32 = t32; - - /* Enable Auxiliary OSCOUT1/OSCOUT2 */ - addr32 = (u32 *)0xfed80e40; - t32 = *addr32; - t32 &= 0xffffff7b; // clear 2, 7 - *addr32 = t32; - - nct5104d_enable_uartd(SERIAL_DEV); - nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -} - -#if 0 - /* Was before copy_and_run. */ - outb(0xEA, 0xCD6); - outb(0x1, 0xcd7); -#endif
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37977
to look at the new patch set (#2).
Change subject: src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK
Warning: not tested on hardware.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I5464b4ce07643b83f9d948858d3a773edb817aaf --- M src/mainboard/hp/abm/Kconfig M src/mainboard/hp/abm/Kconfig.name M src/mainboard/hp/abm/Makefile.inc A src/mainboard/hp/abm/bootblock.c D src/mainboard/hp/abm/romstage.c 5 files changed, 46 insertions(+), 76 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/37977/2
Mike Banon has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/37977 )
Change subject: src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
Abandoned
These remaining-with-ROMCC rare boards seem to be broken: even if switched away from ROMCC_BOOTBLOCK, their builds are failing because of the other reasons (unrelated to new bootblock.c file). I am abandoning their "switch away from ROMCC_BOOTBLOCK" changes (CB:37975 - CB:37982), but if anyone cares about these boards - they can restore these changes and advance. Read more at CB:37750.
Mike Banon has restored this change. ( https://review.coreboot.org/c/coreboot/+/37977 )
Change subject: src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
Restored
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37977
to look at the new patch set (#5).
Change subject: [TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
[TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK
Warning: not tested on hardware.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I5464b4ce07643b83f9d948858d3a773edb817aaf --- M src/mainboard/hp/abm/Kconfig M src/mainboard/hp/abm/Kconfig.name M src/mainboard/hp/abm/Makefile.inc A src/mainboard/hp/abm/bootblock.c D src/mainboard/hp/abm/romstage.c 5 files changed, 46 insertions(+), 76 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/37977/5
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37977 )
Change subject: [TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
Patch Set 5:
(4 comments)
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... File src/mainboard/hp/abm/bootblock.c:
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... PS5, Line 28: addr32 = (u32 *)0xfed80e28; : t32 = *addr32; t32 = misc_read32(0x28);
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... PS5, Line 32: *addr32 = t32; misc_write32(0x28, t32);
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... PS5, Line 35: addr32 = (u32 *)0xfed80e40; : t32 = *addr32; t32 = misc_read32(0x40);
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... PS5, Line 38: *addr32 = t32; misc_write32(0x40, t32);
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37977
to look at the new patch set (#6).
Change subject: [TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
[TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK
Warning: not tested on hardware.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I5464b4ce07643b83f9d948858d3a773edb817aaf --- M src/mainboard/hp/abm/Kconfig M src/mainboard/hp/abm/Kconfig.name M src/mainboard/hp/abm/Makefile.inc A src/mainboard/hp/abm/bootblock.c D src/mainboard/hp/abm/romstage.c 5 files changed, 43 insertions(+), 76 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/37977/6
Mike Banon has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37977 )
Change subject: [TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
Patch Set 6:
(4 comments)
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... File src/mainboard/hp/abm/bootblock.c:
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... PS5, Line 28: addr32 = (u32 *)0xfed80e28; : t32 = *addr32;
t32 = misc_read32(0x28);
Done
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... PS5, Line 32: *addr32 = t32;
misc_write32(0x28, t32);
Done
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... PS5, Line 35: addr32 = (u32 *)0xfed80e40; : t32 = *addr32;
t32 = misc_read32(0x40);
Done
https://review.coreboot.org/c/coreboot/+/37977/5/src/mainboard/hp/abm/bootbl... PS5, Line 38: *addr32 = t32;
misc_write32(0x40, t32);
Done
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37977
to look at the new patch set (#7).
Change subject: [TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
[TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK
Warning: not tested on hardware.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I5464b4ce07643b83f9d948858d3a773edb817aaf --- M src/mainboard/hp/abm/Kconfig M src/mainboard/hp/abm/Kconfig.name M src/mainboard/hp/abm/Makefile.inc A src/mainboard/hp/abm/bootblock.c D src/mainboard/hp/abm/romstage.c 5 files changed, 43 insertions(+), 76 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/37977/7
Mike Banon has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/37977 )
Change subject: [TESTME]src/mb/hp/abm: Switch away from ROMCC_BOOTBLOCK ......................................................................
Abandoned
Superseded by CB:38866
-
Michał Żygowski (Code Review) -
Mike Banon (Code Review)