Change in coreboot[master]: soc/intel/alderlake: Add support to update the FIVR configs

[build bot (Jenkins) (Code Review)]

Attention is currently required from: V Sowmya, Kedar J. Karanje, Maulik V Vaghela, [e-mail], Tim Wawrzynczak, Vinay Kumar, Patrick Rudolph.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55702 )

Change subject: soc/intel/alderlake: Add support to update the FIVR configs
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Patch Set 3:

(1 comment)

File src/soc/intel/alderlake/fsp_params.c:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-122713):
https://review.coreboot.org/c/coreboot/+/55702/comment/ddc1daad_a5d0d4d1 
PS3, Line 365: 			(config->ext_fivr_settings.vnn_sx_voltage_mv * 10 / 25 );
space prohibited before that close parenthesis ')'