Change in coreboot[master]: soc/intel/adl: Send EOP early in the boot sequence

[Michael Niewöhner (Code Review)]

Attention is currently required from: Maulik V Vaghela.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62272 )

Change subject: soc/intel/adl: Send EOP early in the boot sequence
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Patch Set 11:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62272/comment/7b90a144_2d2da7f4 
PS11, Line 24: This also aligns with previous flow where
             : FSP used to send EOP once silicon init is done and coreboot used to
             : rely on FSP to send this message.
and why is this only relevant for adl and not for other platforms?

File src/soc/intel/alderlake/chip.c:

https://review.coreboot.org/c/coreboot/+/62272/comment/3ab04451_95ff8390 
PS11, Line 158: Intel CSE team recommends to send EOP close to FW init (between FSP-S exit and
              : 	 * current boot sequence) to reduce message response time from CSE hence moving
              : 	 * sending EOP to earlier stage.
what about cnl,tgl? is this a general recommendation?