Sean Rhodes has uploaded a new patch set (#4). ( https://review.coreboot.org/c/coreboot/+/85691?usp=email )
Change subject: mb/starlabs/*: Configure GPIO UPDs for eSPI ......................................................................
mb/starlabs/*: Configure GPIO UPDs for eSPI
FSP defaults to using pins that are used for LPC; given that coreboot and these boards only supports eSPI, set these pins accordingly.
Change-Id: Ide4d92211fa7ab496c38ce1c4e895337c269d247 Signed-off-by: Sean Rhodes sean@starlabs.systems --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/Makefile.mk A src/mainboard/starlabs/byte_adl/variants/mk_ii/ramstage.c M src/mainboard/starlabs/starbook/variants/adl/ramstage.c M src/mainboard/starlabs/starbook/variants/rpl/ramstage.c M src/mainboard/starlabs/starfighter/variants/rpl/ramstage.c M src/mainboard/starlabs/starlite_adl/variants/mk_v/Makefile.mk A src/mainboard/starlabs/starlite_adl/variants/mk_v/ramstage.c 7 files changed, 53 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/85691/4