Attention is currently required from: Tarun Tuli, John Zhao, Kapil Porwal, Ivy Jian.
Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68854 )
Change subject: mb/google/rex: Disable TBT PCIe rp1 and rp3 root ports
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Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68854/comment/d06e3d3c_2810e63c
PS3, Line 9: Extra memory resource allocation is needed for bridge once a TBT PCIe
We should change the comment and test filed to fit the purpose. Maybe just follow schematic to disable the unused TBT port?
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