Attention is currently required from: Marshall Dawson, Name of user not set #1003801. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Julian Schroeder, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/58279
to look at the new patch set (#2).
Change subject: src/soc/amd/cezanne: enable clock gating ......................................................................
src/soc/amd/cezanne: enable clock gating
Enabling clock gating for CGPLL to lower power consumption in S3 and S0i3 states. See also: Cezanne PPR chapter 7, rev 3.03.
BUG=b:185273565 TEST=iotools mmio_read32 0xfed80e2c and 0e30 show clk gating enabled and suspend_stress_test works.
Change-Id: I33cbdeec62e49db90b680da37e5028df03a9c015 Signed-off-by: Julian Schroeder julianmarcusschroeder@gmail.com --- M src/soc/amd/cezanne/fch.c M src/soc/amd/cezanne/include/soc/southbridge.h 2 files changed, 34 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/58279/2