HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36253 )
Change subject: acpi: Use either a _HID or _ADR, but not both ......................................................................
acpi: Use either a _HID or _ADR, but not both
This is spotted out using acpica version 20191018.
Change-Id: I81286d89da933b503f605737f28772bfb08483a3 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl M src/northbridge/intel/gm45/acpi/hostbridge.asl M src/northbridge/intel/haswell/acpi/hostbridge.asl M src/northbridge/intel/i945/acpi/hostbridge.asl M src/northbridge/intel/nehalem/acpi/hostbridge.asl M src/northbridge/intel/pineview/acpi/hostbridge.asl M src/northbridge/intel/sandybridge/acpi/hostbridge.asl M src/northbridge/intel/x4x/acpi/hostbridge.asl M src/soc/intel/baytrail/acpi/southcluster.asl M src/soc/intel/braswell/acpi/southcluster.asl M src/soc/intel/denverton_ns/acpi/northcluster.asl M src/soc/intel/fsp_baytrail/acpi/southcluster.asl M src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl 13 files changed, 0 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/36253/1
diff --git a/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl b/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl index cb0d2a4..4e9bc32 100644 --- a/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl +++ b/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl @@ -17,7 +17,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
// This is in the SSDT and can be accessed by the DSDT diff --git a/src/northbridge/intel/gm45/acpi/hostbridge.asl b/src/northbridge/intel/gm45/acpi/hostbridge.asl index afa7a61..22e2fda 100644 --- a/src/northbridge/intel/gm45/acpi/hostbridge.asl +++ b/src/northbridge/intel/gm45/acpi/hostbridge.asl @@ -19,7 +19,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl index 1ebdf28..19d788c 100644 --- a/src/northbridge/intel/haswell/acpi/hostbridge.asl +++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl @@ -18,7 +18,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl index 8318773..db493ea 100644 --- a/src/northbridge/intel/i945/acpi/hostbridge.asl +++ b/src/northbridge/intel/i945/acpi/hostbridge.asl @@ -19,7 +19,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/nehalem/acpi/hostbridge.asl b/src/northbridge/intel/nehalem/acpi/hostbridge.asl index 337a9bc..2b26096 100644 --- a/src/northbridge/intel/nehalem/acpi/hostbridge.asl +++ b/src/northbridge/intel/nehalem/acpi/hostbridge.asl @@ -18,7 +18,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl index 3eff101..6b6ef4a 100644 --- a/src/northbridge/intel/pineview/acpi/hostbridge.asl +++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl @@ -19,7 +19,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl index 4c4a509..8f35137 100644 --- a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl +++ b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl @@ -18,7 +18,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/x4x/acpi/hostbridge.asl b/src/northbridge/intel/x4x/acpi/hostbridge.asl index 90f15c7..e3ea18c 100644 --- a/src/northbridge/intel/x4x/acpi/hostbridge.asl +++ b/src/northbridge/intel/x4x/acpi/hostbridge.asl @@ -20,7 +20,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl index 14731ee..4465c22 100644 --- a/src/soc/intel/baytrail/acpi/southcluster.asl +++ b/src/soc/intel/baytrail/acpi/southcluster.asl @@ -47,7 +47,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Name (MCRS, ResourceTemplate() diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 9ecf67a..4b2deb3 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -47,7 +47,6 @@ Name(_HID,EISAID("PNP0A08")) /* PCIe */ Name(_CID,EISAID("PNP0A03")) /* PCI */
-Name(_ADR, 0) Name(_BBN, 0)
Method (_CRS, 0, Serialized) diff --git a/src/soc/intel/denverton_ns/acpi/northcluster.asl b/src/soc/intel/denverton_ns/acpi/northcluster.asl index f212557..58d63c2 100644 --- a/src/soc/intel/denverton_ns/acpi/northcluster.asl +++ b/src/soc/intel/denverton_ns/acpi/northcluster.asl @@ -20,7 +20,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/soc/intel/fsp_baytrail/acpi/southcluster.asl b/src/soc/intel/fsp_baytrail/acpi/southcluster.asl index a38b742..ef4523b 100644 --- a/src/soc/intel/fsp_baytrail/acpi/southcluster.asl +++ b/src/soc/intel/fsp_baytrail/acpi/southcluster.asl @@ -48,7 +48,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Name (MCRS, ResourceTemplate() diff --git a/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl b/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl index fa83f59..ff30f9f 100644 --- a/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl +++ b/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl @@ -21,7 +21,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Name (MCRS, ResourceTemplate() {
Hello Patrick Rudolph, Vanny E, Huang Jin, Philipp Deppenwiese, build bot (Jenkins), Damien Zammit, David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36253
to look at the new patch set (#2).
Change subject: acpi: Use either a _HID or _ADR, but not both ......................................................................
acpi: Use either a _HID or _ADR, but not both
This is spotted out using acpica version 20191018.
Change-Id: I81286d89da933b503f605737f28772bfb08483a3 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl M src/northbridge/intel/gm45/acpi/hostbridge.asl M src/northbridge/intel/haswell/acpi/hostbridge.asl M src/northbridge/intel/i945/acpi/hostbridge.asl M src/northbridge/intel/nehalem/acpi/hostbridge.asl M src/northbridge/intel/pineview/acpi/hostbridge.asl M src/northbridge/intel/sandybridge/acpi/hostbridge.asl M src/northbridge/intel/x4x/acpi/hostbridge.asl M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/baytrail/acpi/southcluster.asl M src/soc/intel/braswell/acpi/southcluster.asl M src/soc/intel/denverton_ns/acpi/northcluster.asl M src/soc/intel/fsp_baytrail/acpi/southcluster.asl M src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl 14 files changed, 0 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/36253/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36253 )
Change subject: acpi: Use either a _HID or _ADR, but not both ......................................................................
Patch Set 2: Code-Review+1
(2 comments)
https://review.coreboot.org/c/coreboot/+/36253/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36253/2//COMMIT_MSG@10 PS2, Line 10: Found-by: ACPICA 20191018
https://review.coreboot.org/c/coreboot/+/36253/2//COMMIT_MSG@13 PS2, Line 13: Tested how?
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36253 )
Change subject: acpi: Use either a _HID or _ADR, but not both ......................................................................
Patch Set 2:
(2 comments)
Thank you.
https://review.coreboot.org/c/coreboot/+/36253/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36253/2//COMMIT_MSG@10 PS2, Line 10:
Found-by: ACPICA 20191018
Ack
https://review.coreboot.org/c/coreboot/+/36253/2//COMMIT_MSG@13 PS2, Line 13:
Tested how?
please see here: https://review.coreboot.org/c/coreboot/+/34907/7
Hello Patrick Rudolph, Vanny E, Huang Jin, Paul Menzel, Philipp Deppenwiese, build bot (Jenkins), Damien Zammit, David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36253
to look at the new patch set (#3).
Change subject: acpi: Use either a _HID or _ADR, but not both ......................................................................
acpi: Use either a _HID or _ADR, but not both
Found-by: ACPICA 20191018 Change-Id: I81286d89da933b503f605737f28772bfb08483a3 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl M src/northbridge/intel/gm45/acpi/hostbridge.asl M src/northbridge/intel/haswell/acpi/hostbridge.asl M src/northbridge/intel/i945/acpi/hostbridge.asl M src/northbridge/intel/nehalem/acpi/hostbridge.asl M src/northbridge/intel/pineview/acpi/hostbridge.asl M src/northbridge/intel/sandybridge/acpi/hostbridge.asl M src/northbridge/intel/x4x/acpi/hostbridge.asl M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/baytrail/acpi/southcluster.asl M src/soc/intel/braswell/acpi/southcluster.asl M src/soc/intel/denverton_ns/acpi/northcluster.asl M src/soc/intel/fsp_baytrail/acpi/southcluster.asl M src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl 14 files changed, 0 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/36253/3
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36253 )
Change subject: acpi: Use either a _HID or _ADR, but not both ......................................................................
Patch Set 3: Code-Review+2
Commit summary could be better, e.g. `Drop wrong _ADR objects for PCI host bridges`. Dropping the _HID would be definitely wrong, while the current summary implies a choice.
Hello Patrick Rudolph, Vanny E, Huang Jin, Arthur Heymans, Paul Menzel, Philipp Deppenwiese, build bot (Jenkins), Nico Huber, Damien Zammit, David Guckian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36253
to look at the new patch set (#4).
Change subject: acpi: Drop wrong _ADR objects for PCI host bridges ......................................................................
acpi: Drop wrong _ADR objects for PCI host bridges
Found-by: ACPICA 20191018 Change-Id: I81286d89da933b503f605737f28772bfb08483a3 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl M src/northbridge/intel/gm45/acpi/hostbridge.asl M src/northbridge/intel/haswell/acpi/hostbridge.asl M src/northbridge/intel/i945/acpi/hostbridge.asl M src/northbridge/intel/nehalem/acpi/hostbridge.asl M src/northbridge/intel/pineview/acpi/hostbridge.asl M src/northbridge/intel/sandybridge/acpi/hostbridge.asl M src/northbridge/intel/x4x/acpi/hostbridge.asl M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/baytrail/acpi/southcluster.asl M src/soc/intel/braswell/acpi/southcluster.asl M src/soc/intel/denverton_ns/acpi/northcluster.asl M src/soc/intel/fsp_baytrail/acpi/southcluster.asl M src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl 14 files changed, 0 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/36253/4
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36253 )
Change subject: acpi: Drop wrong _ADR objects for PCI host bridges ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36253/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/36253/2//COMMIT_MSG@13 PS2, Line 13:
please see here: https://review.coreboot. […]
Ack
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36253 )
Change subject: acpi: Drop wrong _ADR objects for PCI host bridges ......................................................................
acpi: Drop wrong _ADR objects for PCI host bridges
Found-by: ACPICA 20191018 Change-Id: I81286d89da933b503f605737f28772bfb08483a3 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/36253 Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl M src/northbridge/intel/gm45/acpi/hostbridge.asl M src/northbridge/intel/haswell/acpi/hostbridge.asl M src/northbridge/intel/i945/acpi/hostbridge.asl M src/northbridge/intel/nehalem/acpi/hostbridge.asl M src/northbridge/intel/pineview/acpi/hostbridge.asl M src/northbridge/intel/sandybridge/acpi/hostbridge.asl M src/northbridge/intel/x4x/acpi/hostbridge.asl M src/soc/intel/apollolake/acpi/northbridge.asl M src/soc/intel/baytrail/acpi/southcluster.asl M src/soc/intel/braswell/acpi/southcluster.asl M src/soc/intel/denverton_ns/acpi/northcluster.asl M src/soc/intel/fsp_baytrail/acpi/southcluster.asl M src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl 14 files changed, 0 insertions(+), 14 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve
diff --git a/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl b/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl index cb0d2a4..4e9bc32 100644 --- a/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl +++ b/src/northbridge/intel/fsp_rangeley/acpi/hostbridge.asl @@ -17,7 +17,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
// This is in the SSDT and can be accessed by the DSDT diff --git a/src/northbridge/intel/gm45/acpi/hostbridge.asl b/src/northbridge/intel/gm45/acpi/hostbridge.asl index afa7a61..22e2fda 100644 --- a/src/northbridge/intel/gm45/acpi/hostbridge.asl +++ b/src/northbridge/intel/gm45/acpi/hostbridge.asl @@ -19,7 +19,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/haswell/acpi/hostbridge.asl b/src/northbridge/intel/haswell/acpi/hostbridge.asl index 1ebdf28..19d788c 100644 --- a/src/northbridge/intel/haswell/acpi/hostbridge.asl +++ b/src/northbridge/intel/haswell/acpi/hostbridge.asl @@ -18,7 +18,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl index 8318773..db493ea 100644 --- a/src/northbridge/intel/i945/acpi/hostbridge.asl +++ b/src/northbridge/intel/i945/acpi/hostbridge.asl @@ -19,7 +19,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/nehalem/acpi/hostbridge.asl b/src/northbridge/intel/nehalem/acpi/hostbridge.asl index 337a9bc..2b26096 100644 --- a/src/northbridge/intel/nehalem/acpi/hostbridge.asl +++ b/src/northbridge/intel/nehalem/acpi/hostbridge.asl @@ -18,7 +18,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl index 3eff101..6b6ef4a 100644 --- a/src/northbridge/intel/pineview/acpi/hostbridge.asl +++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl @@ -19,7 +19,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl index 4c4a509..8f35137 100644 --- a/src/northbridge/intel/sandybridge/acpi/hostbridge.asl +++ b/src/northbridge/intel/sandybridge/acpi/hostbridge.asl @@ -18,7 +18,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/northbridge/intel/x4x/acpi/hostbridge.asl b/src/northbridge/intel/x4x/acpi/hostbridge.asl index 90f15c7..e3ea18c 100644 --- a/src/northbridge/intel/x4x/acpi/hostbridge.asl +++ b/src/northbridge/intel/x4x/acpi/hostbridge.asl @@ -20,7 +20,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index 919026a..2f2a064 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -17,7 +17,6 @@
Name(_HID, EISAID("PNP0A08")) /* PCIe */ Name(_CID, EISAID("PNP0A03")) /* PCI */ - Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl index 14731ee..4465c22 100644 --- a/src/soc/intel/baytrail/acpi/southcluster.asl +++ b/src/soc/intel/baytrail/acpi/southcluster.asl @@ -47,7 +47,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Name (MCRS, ResourceTemplate() diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 9ecf67a..4b2deb3 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -47,7 +47,6 @@ Name(_HID,EISAID("PNP0A08")) /* PCIe */ Name(_CID,EISAID("PNP0A03")) /* PCI */
-Name(_ADR, 0) Name(_BBN, 0)
Method (_CRS, 0, Serialized) diff --git a/src/soc/intel/denverton_ns/acpi/northcluster.asl b/src/soc/intel/denverton_ns/acpi/northcluster.asl index f212557..58d63c2 100644 --- a/src/soc/intel/denverton_ns/acpi/northcluster.asl +++ b/src/soc/intel/denverton_ns/acpi/northcluster.asl @@ -20,7 +20,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Device (MCHC) diff --git a/src/soc/intel/fsp_baytrail/acpi/southcluster.asl b/src/soc/intel/fsp_baytrail/acpi/southcluster.asl index a38b742..ef4523b 100644 --- a/src/soc/intel/fsp_baytrail/acpi/southcluster.asl +++ b/src/soc/intel/fsp_baytrail/acpi/southcluster.asl @@ -48,7 +48,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Name (MCRS, ResourceTemplate() diff --git a/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl b/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl index fa83f59..ff30f9f 100644 --- a/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl +++ b/src/soc/intel/fsp_broadwell_de/acpi/southcluster.asl @@ -21,7 +21,6 @@ Name(_HID,EISAID("PNP0A08")) // PCIe Name(_CID,EISAID("PNP0A03")) // PCI
-Name(_ADR, 0) Name(_BBN, 0)
Name (MCRS, ResourceTemplate() {
-
HAOUAS Elyes (Code Review) -
Nico Huber (Code Review)
-
Patrick Georgi (Code Review)
-
Paul Menzel (Code Review)