Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83949?usp=email )
Change subject: mb/goog/{brya,brask,nissa}: unlock gpio wake sources ......................................................................
mb/goog/{brya,brask,nissa}: unlock gpio wake sources
The power off code in depthcharge disables all GPEs prior to power off. The problem is that for gpio wake sources that are locked, this power off code cannot successfully clear any pending interrupt from that source. This can result in the device incorrectly waking back up after it's been powered off from the firmware dev screen.
BUG=b:360380950 BRANCH=firmware-brya-14505.B TEST=verify brask or brya DUT is able to power down and stay powered down when selecting the "Power off" button in the firmware dev screen.
Change-Id: Ic0ac73f8f29761f072d42f35e97198b56d32a9bc Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/brya/variants/baseboard/brask/gpio.c M src/mainboard/google/brya/variants/baseboard/nissa/gpio.c M src/mainboard/google/brya/variants/orisa/gpio.c M src/mainboard/google/brya/variants/trulo/gpio.c 4 files changed, 7 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/83949/1
diff --git a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c index 3d667b9..7e86221 100644 --- a/src/mainboard/google/brya/variants/baseboard/brask/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brask/gpio.c @@ -239,11 +239,11 @@ /* F14 : GSXDIN ==> EN_PP3300_SSD */ PAD_CFG_GPO_LOCK(GPP_F14, 1, LOCK_CONFIG), /* F15 : GSXSRESET# ==> FPMCU_INT_L */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F15, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_F15, NONE, PWROK, LEVEL, INVERT), /* F16 : GSXCLK ==> GSPI_PCH_CS_FPMCU_R_L */ PAD_CFG_NF_LOCK(GPP_F16, NONE, NF4, LOCK_CONFIG), /* F17 : THC1_SPI2_RST# ==> EC_PCH_INT_ODL */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F17, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_F17, NONE, PWROK, LEVEL, INVERT), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ PAD_CFG_GPI_LOCK(GPP_F18, NONE, LOCK_CONFIG), /* F19 : SRCCLKREQ6# ==> LAN_CLKREQ_ODL */ diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c index 7f74256..520bbe0 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c @@ -242,7 +242,7 @@ /* F16 : NC */ PAD_NC_LOCK(GPP_F16, NONE, LOCK_CONFIG), /* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F17, NONE, EDGE_SINGLE, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_F17, NONE, PWROK, EDGE_SINGLE, INVERT), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ PAD_CFG_GPI_LOCK(GPP_F18, NONE, LOCK_CONFIG), /* F19 : Not available */ diff --git a/src/mainboard/google/brya/variants/orisa/gpio.c b/src/mainboard/google/brya/variants/orisa/gpio.c index 7d0fc28..1651b08 100644 --- a/src/mainboard/google/brya/variants/orisa/gpio.c +++ b/src/mainboard/google/brya/variants/orisa/gpio.c @@ -58,7 +58,7 @@ /* B2 : NC */ PAD_NC(GPP_B2, NONE), /* B3 : CPU_GP2 ==> EC_TP_INT */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_B3, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_B3, NONE, PWROK, LEVEL, INVERT), /* B4 : PROC_GP3 ==> EN_PP3300_UCAM_X */ PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG), /* B5 : GPP_B5 ==> ISH_I2C0_SCL */ @@ -242,7 +242,7 @@ /* F16 : NC */ PAD_NC_LOCK(GPP_F16, NONE, LOCK_CONFIG), /* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F17, NONE, EDGE_SINGLE, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_F17, NONE, PWROK, EDGE_SINGLE, INVERT), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ PAD_CFG_GPI_LOCK(GPP_F18, NONE, LOCK_CONFIG), /* F19 : Not available */ diff --git a/src/mainboard/google/brya/variants/trulo/gpio.c b/src/mainboard/google/brya/variants/trulo/gpio.c index 7d0fc28..1651b08 100644 --- a/src/mainboard/google/brya/variants/trulo/gpio.c +++ b/src/mainboard/google/brya/variants/trulo/gpio.c @@ -58,7 +58,7 @@ /* B2 : NC */ PAD_NC(GPP_B2, NONE), /* B3 : CPU_GP2 ==> EC_TP_INT */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_B3, NONE, LEVEL, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_B3, NONE, PWROK, LEVEL, INVERT), /* B4 : PROC_GP3 ==> EN_PP3300_UCAM_X */ PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG), /* B5 : GPP_B5 ==> ISH_I2C0_SCL */ @@ -242,7 +242,7 @@ /* F16 : NC */ PAD_NC_LOCK(GPP_F16, NONE, LOCK_CONFIG), /* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */ - PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F17, NONE, EDGE_SINGLE, INVERT, LOCK_CONFIG), + PAD_CFG_GPI_IRQ_WAKE(GPP_F17, NONE, PWROK, EDGE_SINGLE, INVERT), /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ PAD_CFG_GPI_LOCK(GPP_F18, NONE, LOCK_CONFIG), /* F19 : Not available */