Attention is currently required from: Kevin Chang, Peichao Wang, Kane Chen.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62919 )
Change subject: mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s
......................................................................
Patch Set 9:
(2 comments)
Patchset:
PS9:
Please split the mainboard and SoC changes into 2 separate commits
File src/soc/intel/alderlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/62919/comment/be1929f5_6cfa52f7
PS9, Line 300: int
nit: `unsigned int`
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