Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30113
Change subject: mb/google/sarien: Setup GPIOs again after FSP-S ......................................................................
mb/google/sarien: Setup GPIOs again after FSP-S
Currently FSP is incorrectly modifying GPIO pad configuration if specific UPD variables are not set as it expects. Until FSP is fixed this workaround re-programms the GPIO settings after FSP-S step so they are correct for the OS.
BUG=b:120686247 TEST=verify correct GPIO configuration for GPP_E group in the kernel
Change-Id: I19550c4347cf65d409de6a8638619270372c4d0a Signed-off-by: Duncan Laurie dlaurie@google.com --- M src/mainboard/google/sarien/ramstage.c 1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/30113/1
diff --git a/src/mainboard/google/sarien/ramstage.c b/src/mainboard/google/sarien/ramstage.c index c65104b..c2dc27d 100644 --- a/src/mainboard/google/sarien/ramstage.c +++ b/src/mainboard/google/sarien/ramstage.c @@ -27,8 +27,19 @@ gpio_configure_pads(gpio_table, num_gpios); }
+/* Workaround FSP issue by reprogramming GPIOs after FSP-S */ +static void mainboard_init(struct device *dev) +{ + const struct pad_config *gpio_table; + size_t num_gpios; + + gpio_table = variant_gpio_table(&num_gpios); + gpio_configure_pads(gpio_table, num_gpios); +} + static void mainboard_enable(struct device *dev) { + dev->ops->init = mainboard_init; dev->ops->acpi_inject_dsdt_generator = chromeos_dsdt_generator; }