Change in coreboot[master]: soc/intel/alderlake: Rename ADL_P_482_CORE to ADL_P_482_28W_CORE

[Curtis Chen (Code Review)]

Curtis Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/60267 )

Change subject: soc/intel/alderlake: Rename ADL_P_482_CORE to ADL_P_482_28W_CORE
......................................................................

soc/intel/alderlake: Rename ADL_P_482_CORE to ADL_P_482_28W_CORE

Every VR config items are not the same between ADL-P 4+8+2 28 & 45W.
Now the exist setting is only for ADL-P 4+8+2 28W, so we rename it.

BUG=b:211365920
TEST=Build and check fsp log to confirm the settings are set properly.

Signed-off-by: Curtis Chen 
Change-Id: I863023eba5fda3b6d45059383d6030427913ca9a
---
M src/soc/intel/alderlake/chip.h
M src/soc/intel/alderlake/chipset.cb
2 files changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/60267/1

diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index 771fc5a..1003894 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -22,7 +22,7 @@
 /* Types of different SKUs */
 enum soc_intel_alderlake_power_limits {
    ADL_P_282_CORE,
-	ADL_P_482_CORE,
+	ADL_P_482_28W_CORE,
    ADL_P_682_28W_CORE,
    ADL_P_682_45W_CORE,
    ADL_M_282_12W_CORE,
@@ -50,7 +50,7 @@
 } cpuid_to_adl[] = {
    { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, ADL_P_282_CORE, TDP_15W },
    { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, ADL_P_242_CORE, TDP_15W },
-	{ PCI_DEVICE_ID_INTEL_ADL_P_ID_5, ADL_P_482_CORE, TDP_28W },
+	{ PCI_DEVICE_ID_INTEL_ADL_P_ID_5, ADL_P_482_28W_CORE, TDP_28W },
    { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, ADL_P_682_28W_CORE, TDP_28W },
    { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, ADL_P_682_45W_CORE, TDP_45W },
    { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, ADL_P_442_45W_CORE, TDP_45W },
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb
index 60c149a..bacc025 100644
--- a/src/soc/intel/alderlake/chipset.cb
+++ b/src/soc/intel/alderlake/chipset.cb
@@ -8,7 +8,7 @@
    	.tdp_pl4 = 123,
    }"

-	register "power_limits_config[ADL_P_482_CORE]" = "{
+	register "power_limits_config[ADL_P_482_28W_CORE]" = "{
    	.tdp_pl1_override = 28,
    	.tdp_pl2_override = 64,
    	.tdp_pl4 = 90,