[S] Change in coreboot[master]: mb/google/rex: Add Power Limits

[Jérémy Compostella (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal.

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74573 )

Change subject: mb/google/rex: Add Power Limits
......................................................................

mb/google/rex: Add Power Limits

This patch defines the Power Limits applicable to the rex board
designs per document #640982 revision 1p1 and considering that Fast
VMode is enabled.

BRANCH=None
BUG=b:262499722
TEST=TBD

Change-Id: Id01ba17567eb072941a687a70cf13405469a5a3c
Signed-off-by: Jeremy Compostella 
---
M src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
1 file changed, 38 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/74573/1

diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index 9a71e95..08e1c40 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -1,4 +1,24 @@
 chip soc/intel/meteorlake
+	register "power_config" = "{
+		{
+			.sa_dev_id = PCI_DID_INTEL_MTL_P_ID_1,
+			.tdp = 45,
+			.limits = {
+				.tdp_pl1_override = 45,
+				.tdp_pl2_override = 115,
+				.tdp_pl4 = 197
+			}
+		},
+		{
+			.sa_dev_id = PCI_DID_INTEL_MTL_P_ID_2,
+			.tdp = 15,
+			.limits = {
+				.tdp_pl1_override = 15,
+				.tdp_pl2_override = 57,
+				.tdp_pl4 = 101
+			}
+		}
+	}"

# GPE configuration
    register "pmc_gpe0_dw0" = "GPP_B"