Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31820
Change subject: Docs/project_ideas: Add a "parse SerialICE traces" project idea ......................................................................
Docs/project_ideas: Add a "parse SerialICE traces" project idea
Change-Id: I696811ff93948358f03ff617d294ecc40bd4c746 Signed-off-by: Patrick Georgi pgeorgi@google.com --- M Documentation/contributing/project_ideas.md 1 file changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/31820/1
diff --git a/Documentation/contributing/project_ideas.md b/Documentation/contributing/project_ideas.md index 97499a8..21a756d 100644 --- a/Documentation/contributing/project_ideas.md +++ b/Documentation/contributing/project_ideas.md @@ -179,3 +179,25 @@ useful for firmware related work: Automatically parse formats (eg. by integrating UEFITool, cbfstool, decompressors), automatically identify 16/32/64bit code on x86/amd64, etc. + +## Learn hardware behavior from I/O and memory access logs +[SerialICE](https://www.serialice.com) is a tool to trace the behavior of +executable code like firmware images. One result of that is a long log file +containing the accesses to hardware resources. + +It would be useful to have a tool that assists a developer-analyst in deriving +knowledge about hardware from such logs. This likely can't be entirely +automatic, but a tool that finds patterns and can propagate them across the +log (incrementially raising the log from plain I/O accesses to a high-level +description of driver behavior) would be of great use. + +This is a research-heavy project. + +### Requirements +* Driver knowledge: Somebody working on this should be familiar with + how hardware works (eg. MMIO based register access, index/data port + accesses) and how to read data sheets. +* Machine Learning: ML techniques may be useful to find structure in traces. + +### Mentors +* Ron Minnich rminnich@google.com
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31820 )
Change subject: Docs/project_ideas: Add a "parse SerialICE traces" project idea ......................................................................
Patch Set 1: Code-Review+2
If I understand properly, this idea is about parsing the low-level SerialICE output to a higher-level meaning (e.g. these reads/writes are setting up the LPC controller). It definitely requires research, but it would be a very powerful tool once it starts doing something.
I like the idea!
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31820 )
Change subject: Docs/project_ideas: Add a "parse SerialICE traces" project idea ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31820/1/Documentation/contributing/project_i... File Documentation/contributing/project_ideas.md:
https://review.coreboot.org/#/c/31820/1/Documentation/contributing/project_i... PS1, Line 188: It would be useful to have a tool that assists a developer-analyst in deriving there's already such a tool to convert raw IO to human readable format. Especially PCI accesses, EC and SUPERIO access.
It would however nice to document how it works and how to use it.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31820 )
Change subject: Docs/project_ideas: Add a "parse SerialICE traces" project idea ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/#/c/31820/1/Documentation/contributing/project_i... File Documentation/contributing/project_ideas.md:
https://review.coreboot.org/#/c/31820/1/Documentation/contributing/project_i... PS1, Line 188: It would be useful to have a tool that assists a developer-analyst in deriving
there's already such a tool to convert raw IO to human readable format. […]
SerialICE WIKI explains the (lack of) user interface.
There was an interested party on IRC. He/She may have picked up a task of moving that raw log from QEMU stdout to socket, that should help on UI integration.
https://review.coreboot.org/#/c/31820/1/Documentation/contributing/project_i... PS1, Line 192: description of driver behavior) would be of great use. WIKI has some ideas; like understanding PCI header structures better.
I quess any heuristics on memory controller registers would be most interesting.
https://review.coreboot.org/#/c/31820/1/Documentation/contributing/project_i... PS1, Line 203: * Ron Minnich rminnich@google.com I can support on SerialICE LUA and low-level architecture question. If you want, you can add me here.
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31820 )
Change subject: Docs/project_ideas: Add a "parse SerialICE traces" project idea ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31820/1/Documentation/contributing/project_i... File Documentation/contributing/project_ideas.md:
https://review.coreboot.org/#/c/31820/1/Documentation/contributing/project_i... PS1, Line 188: It would be useful to have a tool that assists a developer-analyst in deriving
SerialICE WIKI explains the (lack of) user interface. […]
It's good to have a hand-crafted tool to decode a few access patterns of standard buses, but this would be more about a tool to build such tools that find patterns - in unknown devices - in a more scalable way (eg. a register is read until bit7 is cleared -> probably a busy bit).
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31820 )
Change subject: Docs/project_ideas: Add a "parse SerialICE traces" project idea ......................................................................
Docs/project_ideas: Add a "parse SerialICE traces" project idea
Change-Id: I696811ff93948358f03ff617d294ecc40bd4c746 Signed-off-by: Patrick Georgi pgeorgi@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/31820 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M Documentation/contributing/project_ideas.md 1 file changed, 22 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/Documentation/contributing/project_ideas.md b/Documentation/contributing/project_ideas.md index 97499a8..21a756d 100644 --- a/Documentation/contributing/project_ideas.md +++ b/Documentation/contributing/project_ideas.md @@ -179,3 +179,25 @@ useful for firmware related work: Automatically parse formats (eg. by integrating UEFITool, cbfstool, decompressors), automatically identify 16/32/64bit code on x86/amd64, etc. + +## Learn hardware behavior from I/O and memory access logs +[SerialICE](https://www.serialice.com) is a tool to trace the behavior of +executable code like firmware images. One result of that is a long log file +containing the accesses to hardware resources. + +It would be useful to have a tool that assists a developer-analyst in deriving +knowledge about hardware from such logs. This likely can't be entirely +automatic, but a tool that finds patterns and can propagate them across the +log (incrementially raising the log from plain I/O accesses to a high-level +description of driver behavior) would be of great use. + +This is a research-heavy project. + +### Requirements +* Driver knowledge: Somebody working on this should be familiar with + how hardware works (eg. MMIO based register access, index/data port + accesses) and how to read data sheets. +* Machine Learning: ML techniques may be useful to find structure in traces. + +### Mentors +* Ron Minnich rminnich@google.com