[S] Change in coreboot[master]: mb/google/nissa/uldren: Configure the external V1p05/Vnn/VnnSx

[Dtrain Hsu (Code Review)]

Attention is currently required from: Tarun Tuli, Dtrain Hsu, Subrata Banik, Reka Norman, Shou-Chieh Hsu.

Hello John Su, build bot (Jenkins), Tarun Tuli, Ian Feng, Subrata Banik, Derek Huang, Reka Norman, Eric Lai, Shou-Chieh Hsu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/74335

to look at the new patch set (#5).

Change subject: mb/google/nissa/uldren: Configure the external V1p05/Vnn/VnnSx
......................................................................

mb/google/nissa/uldren: Configure the external V1p05/Vnn/VnnSx

This patch configures external V1p05/Vnn/VnnSx rails for Uldren
to achieve better power savings.

* Enable the external V1p05, Vnn, VnnSx rails in S0i1, S0i2, S0i3, S3,
  S4, S5 , S0 states.
* Set the supported voltage states.
* Set the voltage for v1p05 and vnn.
* Set the ICC max for v1p05 and vnn.

BUG=b:272829190
BRANCH=firmware-nissa-15217.B
TEST=emerge-nissa coreboot

Change-Id: I3ff8e7db33bfbe4048327825406462262e8d2919
Signed-off-by: Dtrain Hsu 
---
M src/mainboard/google/brya/variants/uldren/overridetree.cb
1 file changed, 38 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/74335/5