Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43570 )
Change subject: mb/system76/lemp9/gpio: 1/2 Decode raw register values ......................................................................
mb/system76/lemp9/gpio: 1/2 Decode raw register values
Use the intelp2m utility [1,2] with -adv options to convert the pad configuration format with the raw values of the DW0 and DW1 registers to the format with the bit fiends macros: PAD_FUNC(), PAD_RESET(), PAD_TRIG(), PAD_BUF(), PAD_PULL(), etc...
./intelp2m -adv -t 1 -file ../../src/mainboard/system76/lemp9/gpio.h
[*] The test with BUILD_TIMELESS = 1 is successfully. The images before and after the patch are the same.
This is part of the patch set "system76/lemp9/gpio: Convert raw DW0/1 regs to macro using intelp2m"
CB: - 1/2 Decode raw register values CB: - 2/2 Convert field macros to PAD_CFG
[1] https://github.com/maxpoliak/pch-pads-parser [2] https://review.coreboot.org/c/coreboot/+/35643
Change-Id: I62bac6ed04af41491ce170935f023034cf5d0bca Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/system76/lemp9/gpio.h 1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/43570/1
diff --git a/src/mainboard/system76/lemp9/gpio.h b/src/mainboard/system76/lemp9/gpio.h index d06145d..4a67927 100644 --- a/src/mainboard/system76/lemp9/gpio.h +++ b/src/mainboard/system76/lemp9/gpio.h @@ -89,7 +89,7 @@
// GSPI1 // INTP_OUT - _PAD_CFG_STRUCT(GPP_A11, 0x80100100, 0x0000), + _PAD_CFG_STRUCT(GPP_A11, PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), 0),
// ISH_GP // PCH_GPP_A12 @@ -140,7 +140,7 @@
// CPU Misc // GPP_B3 - _PAD_CFG_STRUCT(GPP_B3, 0x80100100, 0x0000), + _PAD_CFG_STRUCT(GPP_B3, PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), 0), // NC PAD_CFG_NC(GPP_B4),
@@ -280,7 +280,7 @@
// GSPI2 // SWI# - _PAD_CFG_STRUCT(GPP_D9, 0x40880100, 0x0000), + _PAD_CFG_STRUCT(GPP_D9, PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), 0), // NC PAD_CFG_NC(GPP_D10), // BOARD_ID @@ -363,9 +363,9 @@ // HDMI_HPD PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), // SMI# - _PAD_CFG_STRUCT(GPP_E15, 0x42840100, 0x0), + _PAD_CFG_STRUCT(GPP_E15, PAD_RESET(DEEP) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), 0), // SCI# - _PAD_CFG_STRUCT(GPP_E16, 0x80880100, 0x0000), + _PAD_CFG_STRUCT(GPP_E16, PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), 0), // EDP_HPD PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), // MDP_CTRLCLK
Maxim Polyakov has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/43570 )
Change subject: mb/system76/lemp9/gpio: 1/2 Decode raw register values ......................................................................
mb/system76/lemp9/gpio: 1/2 Decode raw register values
Use the intelp2m utility [1,2] with -adv options to convert the pad configuration format with the raw values of the DW0 and DW1 registers to the format with the bit fiends macros: PAD_FUNC(), PAD_RESET(), PAD_TRIG(), PAD_BUF(), PAD_PULL(), etc...
./intelp2m -adv -t 1 -file ../../src/mainboard/system76/lemp9/gpio.h
[*] The test with BUILD_TIMELESS = 1 is successfully. The images before and after the patch are the same.
This is part of the patch set "system76/lemp9/gpio: Convert raw DW0/1 regs to macro using intelp2m"
CB:43570 - 1/2 Decode raw register values CB:43571 - 2/2 Convert field macros to PAD_CFG
[1] https://github.com/maxpoliak/pch-pads-parser [2] https://review.coreboot.org/c/coreboot/+/35643
Change-Id: I62bac6ed04af41491ce170935f023034cf5d0bca Signed-off-by: Maxim Polyakov max.senia.poliak@gmail.com --- M src/mainboard/system76/lemp9/gpio.h 1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/43570/2
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43570 )
Change subject: mb/system76/lemp9/gpio: 1/2 Decode raw register values ......................................................................
Patch Set 1:
(5 comments)
https://review.coreboot.org/c/coreboot/+/43570/1/src/mainboard/system76/lemp... File src/mainboard/system76/lemp9/gpio.h:
https://review.coreboot.org/c/coreboot/+/43570/1/src/mainboard/system76/lemp... PS1, Line 92: _PAD_CFG_STRUCT(GPP_A11, PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/43570/1/src/mainboard/system76/lemp... PS1, Line 143: _PAD_CFG_STRUCT(GPP_B3, PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(IOAPIC) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/43570/1/src/mainboard/system76/lemp... PS1, Line 283: _PAD_CFG_STRUCT(GPP_D9, PAD_RESET(DEEP) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/43570/1/src/mainboard/system76/lemp... PS1, Line 366: _PAD_CFG_STRUCT(GPP_E15, PAD_RESET(DEEP) | PAD_TRIG(EDGE_SINGLE) | PAD_IRQ_ROUTE(SMI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
https://review.coreboot.org/c/coreboot/+/43570/1/src/mainboard/system76/lemp... PS1, Line 368: _PAD_CFG_STRUCT(GPP_E16, PAD_RESET(PLTRST) | PAD_IRQ_ROUTE(SCI) | PAD_RX_POL(INVERT) | PAD_BUF(TX_DISABLE), 0), line over 96 characters
Maxim Polyakov has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/43570 )
Change subject: mb/system76/lemp9/gpio: 1/2 Decode raw register values ......................................................................
Abandoned
this code is out-of-date and there is no needed to fix it as-is
-
build bot (Jenkins) (Code Review) -
Maxim Polyakov (Code Review)