[M] Change in coreboot[master]: soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill

[Subrata Banik (Code Review)]

Attention is currently required from: [e-mail], Angel Pons, Arthur Heymans, TangYiwei, Andrey Petrov, Tarun Tuli, Anjaneya "Reddy" Chagam, Johnny Lin, Christian Walter, Kapil Porwal, Tim Wawrzynczak, Lean Sheng Tan, Werner Zeh, David Milosevic, Tim Chu.

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68525 )

Change subject: soc/intel: Add node_num to dimm_info struct + adjust dimm_info_fill
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Patch Set 4:

(1 comment)

Patchset:

PS2:
> Oh, sorry for the confusion. We don't have any dependencies on FSP. The problem we have is that on a DDR5 system (mb/prodrive/atlas) with 2 SO-DIMMs, the SMBIOS tables report the same locators for the DIMMs. This is because both SO-DIMMs are on "Channel 0 Slot 0", but one is on Memory Controller 0 and the other one is on Memory Controller 1.
>
> This change shouldn't make any meaningful difference on its own, because the `node_num` field is not consumed (yet).

Thanks, that clarification.