[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions

[Subrata Banik (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Jamie Ryu.

Subrata Banik has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email )

Change subject: soc/intel/common/block/pmc: Add GPE1 functions
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Patch Set 8:

(1 comment)

File src/soc/intel/common/block/pmc/pmclib.c:

https://review.coreboot.org/c/coreboot/+/84104/comment/6edc5d15_9252b90b?usp... :
PS7, Line 341: pmc_clear_gpi_gpe0_status
> Subrata,
> pmc_enable_gpe() and pmc_enable_std_gpe() are removed. GPE EN bits are enabled in kernel during boot. even if we set those bits in CB, they are over-written by kernel.

I don't see a caller for `pmc_enable_gpe` and `pmc_enable_std_gpe` but there is no harm in extending the functionality of this API to allow to enable GPE1. I can't think of a usevcase beyond if any HW person wish to test the GPE capability alone w/o bothering booting to OS (like we have FW shell to play with the chipset).