[XS] Change in coreboot[main]: soc/mediatek/common: Correct eMMC src clk frequency to 400 MHz

[Mengqi Zhang (Code Review)]

Attention is currently required from: Hung-Te Lin, Kiwi Liu, Paul Menzel, Yidi Lin, Yu-Ping Wu.

Mengqi Zhang has posted comments on this change by Kiwi Liu. ( https://review.coreboot.org/c/coreboot/+/84298?usp=email )

Change subject: soc/mediatek/common: Correct eMMC src clk frequency to 400 MHz
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Patch Set 16:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84298/comment/8a10e096_f14a8759?usp... :
PS12, Line 14: measure eMMC clock ok
> gentle ping

https://partnerissuetracker.corp.google.com/issues/356578805#comment44
Boot time is here. This change has no impact on boot time. In coreboot stage, emmc just issues two short commands, this result is in line with expectations.