Change in coreboot[master]: soc/intel/common/block/cse: Add BWG error recovery to EOP failure
Attention is currently required from: Furquan Shaikh, Subrata Banik, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55675 )
Change subject: soc/intel/common/block/cse: Add BWG error recovery to EOP failure ......................................................................
Patch Set 12:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55675/comment/8c180e39_8687855c PS12, Line 16: Otherwise, die() is called, prefering not to boot over leaving the : insecure MEI bus available.
Was this missed in the patch?
tl;dr I had temporarily changed it to printk() to investigate something.
File src/soc/intel/common/block/cse/cse_eop.c:
https://review.coreboot.org/c/coreboot/+/55675/comment/61c03645_778ecc33 PS12, Line 5: #include <device/pci_def.h> : #include <device/pci_ops.h>
Are these required?
Not anymore.
https://review.coreboot.org/c/coreboot/+/55675/comment/7b7cff06_700aa04f PS12, Line 11: #include <soc/iomap.h>
Is this required?
Done
https://review.coreboot.org/c/coreboot/+/55675/comment/e487b2e6_14919303 PS12, Line 14: #define HECI1_DEVIDLEC 0x800 : #define HECI1_DEVIDLEC_DEVIDLE (1 << 2)
These are now unused.
Done
https://review.coreboot.org/c/coreboot/+/55675/comment/c3c28e52_5de76d21 PS12, Line 149: *
nit: space before *
Done
https://review.coreboot.org/c/coreboot/+/55675/comment/d844eadc_f42c56db PS12, Line 156: "error\nYour system may be in an insecure state.");
PMC IPC will only fail if PMC FW doesn't have the required support added, in such case, can you plea […]
Ah yes, I discovered that the CSE seems to stay in this power-gated state until you hit G3 (HECI interface doesn't work after a warm reboot), so it kept leaving my system in weird states during testing. Subrata, this late in boot, doesn't using the PCR interface have to happen in SMM? (also note these platforms all select `SOC_INTEL_COMMON_BLOCK_HECI_DISABLE_IN_SMM` anyway).
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Tim Wawrzynczak (Code Review)