Change in ...coreboot[master]: mb/google/hatch: Add NC gpios for display and correct the order
Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30544 Change subject: mb/google/hatch: Add NC gpios for display and correct the order ...................................................................... mb/google/hatch: Add NC gpios for display and correct the order Correcting order of display related GPIOs and also adding not connected pin definitions for display GPIOs BUG=b:120914069 BRANCH=none TEST=check if code compiles with changes. Change-Id: I9498284d263516f65513d6395883b6b09dd70fd5 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> --- M src/mainboard/google/hatch/variants/baseboard/gpio.c 1 file changed, 16 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/30544/1 diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 47d8c6c..1011695 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -65,6 +65,22 @@ PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1), /* USB_A_OC_OD USB_OC3*/ PAD_CFG_NF(GPP_E12, NONE, DEEP, NF1), + /* USB_C0_DP_HPD */ + PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), + /* DDI2_HPD_ODL */ + PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), + /* DDPD_HPD2 => NC */ + PAD_NC(GPP_E15, DN_20K), + /* DDPE_HPD2 => NC */ + PAD_NC(GPP_E16, DN_20K), + /* EDP_HPD */ + PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), + /* DDPB_CTRLCLK => NC */ + PAD_NC(GPP_E18, DN_20K), + /* DDPC_CTRLCLK => NC */ + PAD_NC(GPP_E20, DN_20K), + /* DDPD_CTRLCLK => NC */ + PAD_NC(GPP_E22, DN_20K), /* PCH_MEM_STRAP0 */ PAD_CFG_GPI(GPP_F20, NONE, PLTRST), /* PCH_MEM_STRAP1 */ @@ -73,12 +89,6 @@ PAD_CFG_GPI(GPP_F11, NONE, PLTRST), /* PCH_MEM_STRAP3 */ PAD_CFG_GPI(GPP_F22, NONE, PLTRST), - /* USB_C0_DP_HPD */ - PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1), - /* DDI2_HPD_ODL */ - PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), - /* EDP_HPD */ - PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), }; const struct pad_config *__weak variant_gpio_table(size_t *num) -- To view, visit https://review.coreboot.org/c/coreboot/+/30544 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9498284d263516f65513d6395883b6b09dd70fd5 Gerrit-Change-Number: 30544 Gerrit-PatchSet: 1 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela@intel.com> Gerrit-MessageType: newchange
participants (1)
-
Maulik V Vaghela (Code Review)