Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58069 )
Change subject: mb/google/guybrush: simplify LPC_MISC_CONTROL_BITS update ......................................................................
mb/google/guybrush: simplify LPC_MISC_CONTROL_BITS update
Since the LPC_LDRQ0_PD_EN gets set right after it got cleared, we can remove the clearing of that bit. This is split off from the previous patch to be able to use timeless build to verify that the previous patch didn't change any behavior.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ieb300e7c7ce7e74c32ebdade0360ee4bd499b11a Reviewed-on: https://review.coreboot.org/c/coreboot/+/58069 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Raul Rangel rrangel@chromium.org --- M src/mainboard/google/guybrush/bootblock.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved
diff --git a/src/mainboard/google/guybrush/bootblock.c b/src/mainboard/google/guybrush/bootblock.c index 5857d85..3f7d5a1 100644 --- a/src/mainboard/google/guybrush/bootblock.c +++ b/src/mainboard/google/guybrush/bootblock.c @@ -35,7 +35,7 @@ const struct soc_amd_gpio *base_gpios, *override_gpios;
dword = pci_read_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS); - dword &= ~(LPC_LDRQ0_PU_EN | LPC_LDRQ0_PD_EN | LPC_LDRQ1_EN | LPC_LDRQ0_EN); + dword &= ~(LPC_LDRQ0_PU_EN | LPC_LDRQ1_EN | LPC_LDRQ0_EN); dword |= LPC_LDRQ0_PD_EN; pci_write_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS, dword);