Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/57325 )
Change subject: soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL-M ......................................................................
soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL-M
This patch updates the VccIn Aux Imon IccMax for ADL-M
Signed-off-by: Bora Guvendik bora.guvendik@intel.com Change-Id: I21753f2e5e9867f22c05e087cbf1f1e097d28bca Reviewed-on: https://review.coreboot.org/c/coreboot/+/57325 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index e43335e..e182089 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -43,6 +43,7 @@ #define ICC_MAX_ID_ADL_P_5_MA 32000 #define ICC_MAX_ID_ADL_P_6_MA 32000 #define ICC_MAX_ID_ADL_P_7_MA 32000 +#define ICC_MAX_ID_ADL_M_MA 12000
/* * ME End of Post configuration @@ -310,6 +311,9 @@ return ICC_MAX_ID_ADL_P_6_MA; case PCI_DEVICE_ID_INTEL_ADL_P_ID_7: return ICC_MAX_ID_ADL_P_7_MA; + case PCI_DEVICE_ID_INTEL_ADL_M_ID_1: + case PCI_DEVICE_ID_INTEL_ADL_M_ID_2: + return ICC_MAX_ID_ADL_M_MA; default: printk(BIOS_ERR, "Unknown MCH ID: 0x%4x, skipping VccInAuxImonIccMax config\n", mch_id);