Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45718 )
Change subject: sb/intel/lynxpoint/acpi/pch.asl: Drop unused lines ......................................................................
sb/intel/lynxpoint/acpi/pch.asl: Drop unused lines
Change-Id: I8a3a6ac69c6ce6e074f5004df24e67d2b16905fe Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/lynxpoint/acpi/pch.asl 1 file changed, 0 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/45718/1
diff --git a/src/southbridge/intel/lynxpoint/acpi/pch.asl b/src/southbridge/intel/lynxpoint/acpi/pch.asl index 4101985..bace058 100644 --- a/src/southbridge/intel/lynxpoint/acpi/pch.asl +++ b/src/southbridge/intel/lynxpoint/acpi/pch.asl @@ -22,9 +22,6 @@ OperationRegion (RCRB, SystemMemory, DEFAULT_RCBA, 0x4000) Field (RCRB, DWordAcc, Lock, Preserve) { - Offset(0x0000), // Backbone - Offset(0x1000), // Chipset - Offset(0x3000), // Legacy Configuration Registers Offset(0x3404), // High Performance Timer Configuration HPAS, 2, // Address Select , 5,
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45718 )
Change subject: sb/intel/lynxpoint/acpi/pch.asl: Drop unused lines ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45718 )
Change subject: sb/intel/lynxpoint/acpi/pch.asl: Drop unused lines ......................................................................
sb/intel/lynxpoint/acpi/pch.asl: Drop unused lines
Change-Id: I8a3a6ac69c6ce6e074f5004df24e67d2b16905fe Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45718 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: HAOUAS Elyes ehaouas@noos.fr --- M src/southbridge/intel/lynxpoint/acpi/pch.asl 1 file changed, 0 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved
diff --git a/src/southbridge/intel/lynxpoint/acpi/pch.asl b/src/southbridge/intel/lynxpoint/acpi/pch.asl index 154633d..6d0428c 100644 --- a/src/southbridge/intel/lynxpoint/acpi/pch.asl +++ b/src/southbridge/intel/lynxpoint/acpi/pch.asl @@ -23,9 +23,6 @@ OperationRegion(RCRB, SystemMemory, DEFAULT_RCBA, 0x4000) Field(RCRB, DWordAcc, Lock, Preserve) { - Offset(0x0000), // Backbone - Offset(0x1000), // Chipset - Offset(0x3000), // Legacy Configuration Registers Offset(0x3404), // High Performance Timer Configuration HPAS, 2, // Address Select , 5,
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Angel Pons (Code Review) -
HAOUAS Elyes (Code Review)