Change in coreboot[master]: google/trogdor: Update the power on sequence of ps8640

[Xuxin Xiong (Code Review)]

Xuxin Xiong has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58994 )

Change subject: google/trogdor: Update the power on sequence of ps8640
......................................................................

google/trogdor: Update the power on sequence of ps8640

For the Qualcomm PBL configuration of GPIO, we need to initial the
GPIOs for VDD33# and PD# at the beginning of coreboot. According to
the pa8640 latest spec v1.4, update the sequence of VDD33# and PD#.

BUG=b:204637643
BRANCH=trogdor
TEST=verified the waveform of ps8640 at coreboot phase.

Signed-off-by: xuxinxiong 
Change-Id: Ia378aafa49ec462c990501ce48721e330d9648b0
---
M src/mainboard/google/trogdor/chromeos.c
M src/mainboard/google/trogdor/mainboard.c
2 files changed, 12 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/58994/1

diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c
index 9006000..90de1e4 100644
--- a/src/mainboard/google/trogdor/chromeos.c
+++ b/src/mainboard/google/trogdor/chromeos.c
@@ -22,6 +22,8 @@
    } else {
    	gpio_output(GPIO_EN_PP3300_DX_EDP, 0);
    	gpio_output(GPIO_EDP_BRIDGE_ENABLE, 0);
+		gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 0);
+		gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0);
    }

if (CONFIG(TROGDOR_HAS_FINGERPRINT)) {
diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c
index 1a60131..5499a07 100644
--- a/src/mainboard/google/trogdor/mainboard.c
+++ b/src/mainboard/google/trogdor/mainboard.c
@@ -106,12 +106,18 @@
    gpio_output(GPIO_EN_PP3300_DX_EDP, 1);

gpio_output(GPIO_PS8640_EDP_BRIDGE_3V3_ENABLE, 1);
-	gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1);
-	gpio_output(GPIO_PS8640_EDP_BRIDGE_RST_L, 0);

/*
-	 * According to ps8640 app note v0.6, wait for 2ms ("t1") after
-	 * VDD33 goes high and then deassert RST.
+	 * According to ps8640 v1.4 spec, and the raise time of vdd33 is a bit
+	 * long, so wait for 4ms after VDD33 goes high and then deassert PD.
+	 */
+	mdelay(4);
+
+	gpio_output(GPIO_PS8640_EDP_BRIDGE_PD_L, 1);
+
+	/*
+	 * According to ps8640 app note v0.6, wait for 2ms after VDD33 goes
+	 * high and then deassert RST.
     */
    mdelay(2);