Attention is currently required from: Arthur Heymans, Nico Huber, Maulik V Vaghela, Paul Menzel, Mario Scheithauer, Angel Pons, Subrata Banik, Michael Niewöhner, Lean Sheng Tan, Patrick Rudolph, Felix Held.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55367 )
Change subject: soc/intel/elkhartlake: Introduce Intel PSE
......................................................................
Patch Set 52:
(1 comment)
File src/soc/intel/elkhartlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/55367/comment/241fb711_5ec4cb1c
PS49, Line 127: m_cfg->PchPseEnable = CONFIG(PSE_ENABLE);
I don't know what OK means on your scale. You outrank me anyway, so
there is no point in asking me for permission and it's not a technical
matter anyway.
I have always and will continue to value your input Nico, please do not get it wrong. And it is not my intention to outrank you. I guess the best would be to step down a bit and release the time pressure. I will have to cherry-pick this patch private for the time we need to work this out properly and do not insist on merging this patch yet,
Hopefully, in the meantime there will be some result from the talks with Intel that I can use here.
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