Attention is currently required from: Angel Pons, Werner Zeh.
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55261 )
Change subject: cpu/x86/lapic: Split virtual_wire_mode_init()
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Patch Set 8:
(1 comment)
File src/cpu/x86/lapic/lapic.c:
https://review.coreboot.org/c/coreboot/+/55261/comment/f781c59f_c83e6bf8
PS8, Line 21: printk(BIOS_INFO, "Setting up local APIC 0x%x\n", lapicid());
Any reason to print this *after* (and not before) enabling LAPIC?
I am assuming accessing the MMIO (xapic) or MSR (x2apic) register bank before the LAPIC is enabled might not be decoded, and lapicid() reads that register space.
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