Attention is currently required from: Eric Lai, Felix Held, Jason Glenesk, Jason Nien, Karthik Ramasubramanian, Martin Roth, Paul Menzel.
Hello Eric Lai, Felix Held, Jason Glenesk, Jason Nien, Karthik Ramasubramanian, Martin Roth, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/75698?usp=email
to look at the new patch set (#4).
The following approvals got outdated and were removed: Code-Review+1 by Eric Lai, Verified+1 by build bot (Jenkins)
Change subject: mb/google/skyrim: Use CMOS bit to toggle ABL WA for Hynix DRAM ......................................................................
mb/google/skyrim: Use CMOS bit to toggle ABL WA for Hynix DRAM
One specific Hynix LPDDR5x DRAM part requires an ABL workaround to eliminate DRAM-related failures during a FAFT test, but due to the use of generic/common SPDs, there is no way for the ABL to determine the DRAM part # itself.
Consequently, we will have coreboot check the DRAM part #, and set/clear a CMOS bit as appropriate, which the ABL will check in order to apply (or not apply) the workaround.
The ABL already uses byte 0xD of the extended CMOS ports 72/73 for memory context related toggles, so we will use a spare bit there.
BUG=b:270499009, b:281614369, b:286338775 BRANCH=skyrim TEST=run FAFT bios tests on frostflow, markarth, and whiterun without any failures.
Change-Id: Ibb6e145f6cdba7270e0a322ef414bf1cb09c5eaa Signed-off-by: Matt DeVillier matt.devillier@amd.corp-partner.google.com --- M src/mainboard/google/skyrim/bootblock.c 1 file changed, 56 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/75698/4