[XS] Change in coreboot[main]: mb/google/brya: Adjust EC memory map range to support indexed IO

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85547?usp=email )

Change subject: mb/google/brya: Adjust EC memory map range to support indexed IO
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mb/google/brya: Adjust EC memory map range to support indexed IO

Adjust the EC memory map range for indexed IO access in trulo variant
from 0x900 to 0x380

BUG=b:379224648
TEST= able to build nissa/trulo.

Change-Id: Ide5026b35da7c00deab4464eedfca9d52d294fd6
Signed-off-by: Jayvik Desai 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85547
Reviewed-by: Subrata Banik 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
1 file changed, 5 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Subrata Banik: Looks good to me, approved

diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
index 3090bb5..a93c669 100644
--- a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
@@ -8,8 +8,11 @@
    # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
    register "gen1_dec" = "0x00fc0801"
    register "gen2_dec" = "0x000c0201"
-	# EC memory map range is 0x900-0x9ff
-	register "gen3_dec" = "0x00fc0901"
+	# For platform selects EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO
+	#    EC memmap range is in 0x380-0x381
+	# For others
+	#    EC memmap range is in 0x900-0x9ff
+	register "gen3_dec" = "CONFIG(EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO) ? (0x00010001 | CONFIG_EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO_PORT) : 0x00fc0901"

register "usb2_ports[0]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 0
    register "usb2_ports[1]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 1