Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83775?usp=email )
Change subject: soc/amd/common/psp_smi_flash: add spi_controller_available ......................................................................
soc/amd/common/psp_smi_flash: add spi_controller_available
The SPI_SEMAPHORE_DRIVER_LOCKED bit in the SPI_MISC_CNTRL register doesn't affect the hardware, but it re-used by AMD as a semaphore to synchronize the access to the SPI controller between SMM and non-SMM software like an OS-level driver. Since it doesn't affect the hardware, it's marked as reserved in the PPRs. Add the 'spi_controller_available' helper function to check this bit to see if some software or driver outside of SMM is currently using the SPI flash controller to avoid interfering with that operation.
This patch is a slightly reworked version of parts of CB:65523.
Test=When selecting SOC_AMD_COMMON_BLOCK_PSP_SMI, Mandolin still builds
Signed-off-by: Felix Held felix-coreboot@felixheld.de Signed-off-by: Ritul Guru ritul.bits@gmail.com Change-Id: I49218e03a5dd555b2b2d34eaad86673e9fc908c3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/83775 Reviewed-by: Martin Roth martin.roth@amd.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/common/block/include/amdblocks/spi.h M src/soc/amd/common/block/psp/psp_smi_flash.c 2 files changed, 9 insertions(+), 0 deletions(-)
Approvals: Martin Roth: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h index babe635..eafc2c2 100644 --- a/src/soc/amd/common/block/include/amdblocks/spi.h +++ b/src/soc/amd/common/block/include/amdblocks/spi.h @@ -77,6 +77,9 @@ #define SPI_FIFO_DEPTH (SPI_FIFO_LAST_BYTE - SPI_FIFO + 1)
#define SPI_MISC_CNTRL 0xfc +/* AMD has re-purposed this unused SPI controller register bit as a semaphore to synchronize + access to the SPI controller between SMM and non-SMM software/OS driver. */ +#define SPI_SEMAPHORE_DRIVER_LOCKED BIT(4)
struct spi_config { /* diff --git a/src/soc/amd/common/block/psp/psp_smi_flash.c b/src/soc/amd/common/block/psp/psp_smi_flash.c index 4c83fcd..367baef 100644 --- a/src/soc/amd/common/block/psp/psp_smi_flash.c +++ b/src/soc/amd/common/block/psp/psp_smi_flash.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <amdblocks/spi.h> #include <boot_device.h> #include <commonlib/region.h> #include <console/console.h> @@ -134,6 +135,11 @@ return MBOX_PSP_SUCCESS; }
+static inline bool spi_controller_available(void) +{ + return !(spi_read8(SPI_MISC_CNTRL) & SPI_SEMAPHORE_DRIVER_LOCKED); +} + enum mbox_p2c_status psp_smi_spi_get_info(struct mbox_default_buffer *buffer) { struct mbox_pspv2_cmd_spi_info *const cmd_buf =