Change in coreboot[master]: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard
Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard
The baseboard GPIO table definitions are too straineous to the extend that variants need to redefine assumptions back to NC. Invert this so that baseboard by default assumes the safer NC and move the specific board configurations to their respective places.
This patch handles the GPP_A* group for easier review.
BUG=b:142094759 BRANCH=none TEST=builds
Change-Id: I29b4323ac80b1288b2562846217c4f377714fc2c Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/akemi/gpio.c M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/dratini/gpio.c M src/mainboard/google/hatch/variants/hatch/gpio.c M src/mainboard/google/hatch/variants/helios/gpio.c M src/mainboard/google/hatch/variants/jinlon/gpio.c M src/mainboard/google/hatch/variants/kindred/gpio.c M src/mainboard/google/hatch/variants/kohaku/gpio.c M src/mainboard/google/hatch/variants/mushu/gpio.c M src/mainboard/google/hatch/variants/stryke/gpio.c 10 files changed, 60 insertions(+), 60 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37920/1
diff --git a/src/mainboard/google/hatch/variants/akemi/gpio.c b/src/mainboard/google/hatch/variants/akemi/gpio.c index 0780ddb..fd5e58e 100644 --- a/src/mainboard/google/hatch/variants/akemi/gpio.c +++ b/src/mainboard/google/hatch/variants/akemi/gpio.c @@ -19,18 +19,6 @@ #include <commonlib/helpers.h>
static const struct pad_config ssd_sku_gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), - /* A10 : NC */ - PAD_NC(GPP_A10, NONE), - /* A11 : NC */ - PAD_NC(GPP_A11, NONE), - /* A12 : NC */ - PAD_NC(GPP_A12, NONE), /* A18 : NC */ PAD_NC(GPP_A18, NONE), /* A19 : NC */ diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 94cb2e5..42e9501 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -19,26 +19,26 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : SAR0_INT_ODL */ - PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A0 : GPP_A0 ==> NC */ + PAD_NC(GPP_A0, NONE), /* A1 : ESPI_IO0 */ /* A2 : ESPI_IO1 */ /* A3 : ESPI_IO2 */ /* A4 : ESPI_IO3 */ /* A5 : ESPI_CS# */ - /* A6 : SAR1_INT_ODL */ - PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A6 : GPP_A6 ==> NC */ + PAD_NC(GPP_A6, NONE), /* A7 : PP3300_SOC_A */ PAD_NC(GPP_A7, NONE), - /* A8 : PEN_GARAGE_DET_L (wake) */ - PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A8 : GPP_A8 ==> NC */ + PAD_NC(GPP_A8, NONE), /* A9 : ESPI_CLK */ - /* A10 : FPMCU_PCH_BOOT1 */ - PAD_CFG_GPO(GPP_A10, 0, DEEP), - /* A11 : PCH_SPI_FPMCU_CS_L */ - PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), - /* A12 : FPMCU_RST_ODL */ - PAD_CFG_GPO(GPP_A12, 0, DEEP), + /* A10 : GPP_A10 ==> NC */ + PAD_NC(GPP_A10, NONE), + /* A11 : GPP_A11 ==> NC */ + PAD_NC(GPP_A11, NONE), + /* A12 : GPP_A12 ==> NC */ + PAD_NC(GPP_A12, NONE), /* A13 : SUSWARN_L */ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), /* A14 : ESPI_RST_L */ diff --git a/src/mainboard/google/hatch/variants/dratini/gpio.c b/src/mainboard/google/hatch/variants/dratini/gpio.c index 30d56d7..b61748b 100644 --- a/src/mainboard/google/hatch/variants/dratini/gpio.c +++ b/src/mainboard/google/hatch/variants/dratini/gpio.c @@ -19,14 +19,10 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), - /* A10 : NC */ - PAD_NC(GPP_A10, NONE), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* A18 : NC */ PAD_NC(GPP_A18, NONE), /* A19 : NC */ diff --git a/src/mainboard/google/hatch/variants/hatch/gpio.c b/src/mainboard/google/hatch/variants/hatch/gpio.c index 56f587b..a2adf253 100644 --- a/src/mainboard/google/hatch/variants/hatch/gpio.c +++ b/src/mainboard/google/hatch/variants/hatch/gpio.c @@ -19,6 +19,18 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { + /* A0 : SAR0_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A6 : SAR1_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* C13 : EC_PCH_INT_L */ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT)};
diff --git a/src/mainboard/google/hatch/variants/helios/gpio.c b/src/mainboard/google/hatch/variants/helios/gpio.c index 456877c..e4e44cf 100644 --- a/src/mainboard/google/hatch/variants/helios/gpio.c +++ b/src/mainboard/google/hatch/variants/helios/gpio.c @@ -19,10 +19,8 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : RCIN# ==> NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : SERIRQ ==> NC */ - PAD_NC(GPP_A6, NONE), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), /* A18 : ISH_GP0 ==> NC */ PAD_NC(GPP_A18, NONE), /* A19 : ISH_GP1 ==> NC */ diff --git a/src/mainboard/google/hatch/variants/jinlon/gpio.c b/src/mainboard/google/hatch/variants/jinlon/gpio.c index 4622a72..e0d563c 100644 --- a/src/mainboard/google/hatch/variants/jinlon/gpio.c +++ b/src/mainboard/google/hatch/variants/jinlon/gpio.c @@ -19,12 +19,6 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), /* A10 : NC */ PAD_NC(GPP_A10, NONE), /* C12 : FPMCU_PCH_BOOT1 */ diff --git a/src/mainboard/google/hatch/variants/kindred/gpio.c b/src/mainboard/google/hatch/variants/kindred/gpio.c index 9e2d818..f2558ee 100644 --- a/src/mainboard/google/hatch/variants/kindred/gpio.c +++ b/src/mainboard/google/hatch/variants/kindred/gpio.c @@ -19,6 +19,18 @@ #include <commonlib/helpers.h>
static const struct pad_config ssd_sku_gpio_table[] = { + /* A0 : SAR0_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A6 : SAR1_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* F3 : MEM_STRAP_3 */ PAD_CFG_GPI(GPP_F3, NONE, PLTRST), /* F10 : MEM_STRAP_2 */ diff --git a/src/mainboard/google/hatch/variants/kohaku/gpio.c b/src/mainboard/google/hatch/variants/kohaku/gpio.c index f52cc27..837abb3 100644 --- a/src/mainboard/google/hatch/variants/kohaku/gpio.c +++ b/src/mainboard/google/hatch/variants/kohaku/gpio.c @@ -19,12 +19,12 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : RCIN# ==> NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : SERIRQ ==> NC */ - PAD_NC(GPP_A6, NONE), - /* A10 : GPP_A10 ==> NC */ - PAD_NC(GPP_A10, NONE), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* A16 : EMR_GARAGE_DET (notification) */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A16, NONE, PLTRST), /* A17 : PIRQA# ==> NC */ diff --git a/src/mainboard/google/hatch/variants/mushu/gpio.c b/src/mainboard/google/hatch/variants/mushu/gpio.c index 56f587b..a2adf253 100644 --- a/src/mainboard/google/hatch/variants/mushu/gpio.c +++ b/src/mainboard/google/hatch/variants/mushu/gpio.c @@ -19,6 +19,18 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { + /* A0 : SAR0_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A6 : SAR1_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* C13 : EC_PCH_INT_L */ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT)};
diff --git a/src/mainboard/google/hatch/variants/stryke/gpio.c b/src/mainboard/google/hatch/variants/stryke/gpio.c index 4d27554..4fdbe6a 100644 --- a/src/mainboard/google/hatch/variants/stryke/gpio.c +++ b/src/mainboard/google/hatch/variants/stryke/gpio.c @@ -19,18 +19,6 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), - /* A10 : NC */ - PAD_NC(GPP_A10, NONE), - /* A11 : NC */ - PAD_NC(GPP_A11, NONE), - /* A12 : NC */ - PAD_NC(GPP_A12, NONE), /* A22 : NC */ PAD_NC(GPP_A22, NONE), /* A23 : NC */
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37920
to look at the new patch set (#2).
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard
The baseboard GPIO table definitions are too straineous to the extend that variants need to redefine assumptions back to NC. Invert this so that baseboard by default assumes the safer NC and move the specific board configurations to their respective places.
This patch handles the GPP_A* group for easier review.
BUG=b:142094759 BRANCH=none TEST=builds
Change-Id: I29b4323ac80b1288b2562846217c4f377714fc2c Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/akemi/gpio.c M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/dratini/gpio.c M src/mainboard/google/hatch/variants/hatch/gpio.c M src/mainboard/google/hatch/variants/helios/gpio.c M src/mainboard/google/hatch/variants/jinlon/gpio.c M src/mainboard/google/hatch/variants/kindred/gpio.c M src/mainboard/google/hatch/variants/kohaku/gpio.c M src/mainboard/google/hatch/variants/mushu/gpio.c M src/mainboard/google/hatch/variants/stryke/gpio.c 10 files changed, 68 insertions(+), 62 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37920/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37920/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/jinlon/gpio.c:
https://review.coreboot.org/c/coreboot/+/37920/2/src/mainboard/google/hatch/... PS2, Line 23: PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), GPP_A12 was missed.
Hello Kangheui Won, build bot (Jenkins), Daniel Kurtz, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37920
to look at the new patch set (#3).
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard
The baseboard GPIO table definitions are too straineous to the extend that variants need to redefine assumptions back to NC. Invert this so that baseboard by default assumes the safer NC and move the specific board configurations to their respective places.
This patch handles the GPP_A* group for easier review.
BUG=b:142094759 BRANCH=none TEST=builds
Change-Id: I29b4323ac80b1288b2562846217c4f377714fc2c Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/akemi/gpio.c M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/dratini/gpio.c M src/mainboard/google/hatch/variants/hatch/gpio.c M src/mainboard/google/hatch/variants/helios/gpio.c M src/mainboard/google/hatch/variants/jinlon/gpio.c M src/mainboard/google/hatch/variants/kindred/gpio.c M src/mainboard/google/hatch/variants/kohaku/gpio.c M src/mainboard/google/hatch/variants/mushu/gpio.c M src/mainboard/google/hatch/variants/stryke/gpio.c 10 files changed, 70 insertions(+), 62 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37920/3
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37920/2/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/jinlon/gpio.c:
https://review.coreboot.org/c/coreboot/+/37920/2/src/mainboard/google/hatch/... PS2, Line 23: PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2),
GPP_A12 was missed.
great catch, nearly got them all! thanks!
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 3: Code-Review+2
Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 3: Code-Review+1
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 3: Code-Review-1
(1 comment)
https://review.coreboot.org/c/coreboot/+/37920/3/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/kindred/gpio.c:
https://review.coreboot.org/c/coreboot/+/37920/3/src/mainboard/google/hatch/... PS3, Line 22: /* A0 : SAR0_INT_ODL */ : PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), : /* A6 : SAR1_INT_ODL */ : PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), : /* A8 : PEN_GARAGE_DET_L (wake) */ : PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), : /* A10 : FPMCU_PCH_BOOT1 */ : PAD_CFG_GPO(GPP_A10, 0, DEEP), : /* A11 : PCH_SPI_FPMCU_CS_L */ : PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), : /* A12 : FPMCU_RST_ODL */ : PAD_CFG_GPO(GPP_A12, 0, DEEP), : /* F3 : MEM_STRAP_3 */ actually it looks like this block should also be in the 'emmc_sku_gpio_table' and 'gpio_table' tables as well so i'll push another patch to resolve that.
Furquan Shaikh has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Removed Code-Review+2 by Furquan Shaikh furquan@google.com
Hello Kangheui Won, build bot (Jenkins), Daniel Kurtz, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37920
to look at the new patch set (#4).
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard
The baseboard GPIO table definitions are too straineous to the extend that variants need to redefine assumptions back to NC. Invert this so that baseboard by default assumes the safer NC and move the specific board configurations to their respective places.
This patch handles the GPP_A* group for easier review.
BUG=b:142094759 BRANCH=none TEST=builds
Change-Id: I29b4323ac80b1288b2562846217c4f377714fc2c Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/akemi/gpio.c M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/dratini/gpio.c M src/mainboard/google/hatch/variants/hatch/gpio.c M src/mainboard/google/hatch/variants/helios/gpio.c M src/mainboard/google/hatch/variants/jinlon/gpio.c M src/mainboard/google/hatch/variants/kindred/gpio.c M src/mainboard/google/hatch/variants/kohaku/gpio.c M src/mainboard/google/hatch/variants/mushu/gpio.c M src/mainboard/google/hatch/variants/stryke/gpio.c 10 files changed, 94 insertions(+), 62 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37920/4
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37920/3/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/kindred/gpio.c:
https://review.coreboot.org/c/coreboot/+/37920/3/src/mainboard/google/hatch/... PS3, Line 22: /* A0 : SAR0_INT_ODL */ : PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), : /* A6 : SAR1_INT_ODL */ : PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), : /* A8 : PEN_GARAGE_DET_L (wake) */ : PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), : /* A10 : FPMCU_PCH_BOOT1 */ : PAD_CFG_GPO(GPP_A10, 0, DEEP), : /* A11 : PCH_SPI_FPMCU_CS_L */ : PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), : /* A12 : FPMCU_RST_ODL */ : PAD_CFG_GPO(GPP_A12, 0, DEEP), : /* F3 : MEM_STRAP_3 */
actually it looks like this block should also be in the 'emmc_sku_gpio_table' and 'gpio_table' table […]
Done
Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 4: Code-Review+1
Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37920/4/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/akemi/gpio.c:
https://review.coreboot.org/c/coreboot/+/37920/4/src/mainboard/google/hatch/... PS4, Line 81: /* A0 : NC */ akemi also have two gpio tables :(
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/37920/4/src/mainboard/google/hatch/... File src/mainboard/google/hatch/variants/akemi/gpio.c:
https://review.coreboot.org/c/coreboot/+/37920/4/src/mainboard/google/hatch/... PS4, Line 81: /* A0 : NC */
akemi also have two gpio tables :(
Done
Hello Kangheui Won, build bot (Jenkins), Daniel Kurtz, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37920
to look at the new patch set (#5).
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard
The baseboard GPIO table definitions are too straineous to the extend that variants need to redefine assumptions back to NC. Invert this so that baseboard by default assumes the safer NC and move the specific board configurations to their respective places.
This patch handles the GPP_A* group for easier review.
BUG=b:142094759 BRANCH=none TEST=builds
Change-Id: I29b4323ac80b1288b2562846217c4f377714fc2c Signed-off-by: Edward O'Callaghan quasisec@google.com --- M src/mainboard/google/hatch/variants/akemi/gpio.c M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/dratini/gpio.c M src/mainboard/google/hatch/variants/hatch/gpio.c M src/mainboard/google/hatch/variants/helios/gpio.c M src/mainboard/google/hatch/variants/jinlon/gpio.c M src/mainboard/google/hatch/variants/kindred/gpio.c M src/mainboard/google/hatch/variants/kohaku/gpio.c M src/mainboard/google/hatch/variants/mushu/gpio.c M src/mainboard/google/hatch/variants/stryke/gpio.c 10 files changed, 94 insertions(+), 74 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37920/5
Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 5: Code-Review+1
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
Patch Set 5: Code-Review+2
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37920 )
Change subject: mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard ......................................................................
mainboard/google/hatch: Move gpio GPP_A* NC down into baseboard
The baseboard GPIO table definitions are too straineous to the extend that variants need to redefine assumptions back to NC. Invert this so that baseboard by default assumes the safer NC and move the specific board configurations to their respective places.
This patch handles the GPP_A* group for easier review.
BUG=b:142094759 BRANCH=none TEST=builds
Change-Id: I29b4323ac80b1288b2562846217c4f377714fc2c Signed-off-by: Edward O'Callaghan quasisec@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/37920 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kangheui Won khwon@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/akemi/gpio.c M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/dratini/gpio.c M src/mainboard/google/hatch/variants/hatch/gpio.c M src/mainboard/google/hatch/variants/helios/gpio.c M src/mainboard/google/hatch/variants/jinlon/gpio.c M src/mainboard/google/hatch/variants/kindred/gpio.c M src/mainboard/google/hatch/variants/kohaku/gpio.c M src/mainboard/google/hatch/variants/mushu/gpio.c M src/mainboard/google/hatch/variants/stryke/gpio.c 10 files changed, 94 insertions(+), 74 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Kangheui Won: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/hatch/variants/akemi/gpio.c b/src/mainboard/google/hatch/variants/akemi/gpio.c index 0780ddb..41cf141 100644 --- a/src/mainboard/google/hatch/variants/akemi/gpio.c +++ b/src/mainboard/google/hatch/variants/akemi/gpio.c @@ -19,18 +19,6 @@ #include <commonlib/helpers.h>
static const struct pad_config ssd_sku_gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), - /* A10 : NC */ - PAD_NC(GPP_A10, NONE), - /* A11 : NC */ - PAD_NC(GPP_A11, NONE), - /* A12 : NC */ - PAD_NC(GPP_A12, NONE), /* A18 : NC */ PAD_NC(GPP_A18, NONE), /* A19 : NC */ @@ -90,18 +78,6 @@ };
static const struct pad_config gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), - /* A10 : NC */ - PAD_NC(GPP_A10, NONE), - /* A11 : NC */ - PAD_NC(GPP_A11, NONE), - /* A12 : NC */ - PAD_NC(GPP_A12, NONE), /* A18 : NC */ PAD_NC(GPP_A18, NONE), /* A19 : NC */ diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 94cb2e5..42e9501 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -19,26 +19,26 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : SAR0_INT_ODL */ - PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A0 : GPP_A0 ==> NC */ + PAD_NC(GPP_A0, NONE), /* A1 : ESPI_IO0 */ /* A2 : ESPI_IO1 */ /* A3 : ESPI_IO2 */ /* A4 : ESPI_IO3 */ /* A5 : ESPI_CS# */ - /* A6 : SAR1_INT_ODL */ - PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A6 : GPP_A6 ==> NC */ + PAD_NC(GPP_A6, NONE), /* A7 : PP3300_SOC_A */ PAD_NC(GPP_A7, NONE), - /* A8 : PEN_GARAGE_DET_L (wake) */ - PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A8 : GPP_A8 ==> NC */ + PAD_NC(GPP_A8, NONE), /* A9 : ESPI_CLK */ - /* A10 : FPMCU_PCH_BOOT1 */ - PAD_CFG_GPO(GPP_A10, 0, DEEP), - /* A11 : PCH_SPI_FPMCU_CS_L */ - PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), - /* A12 : FPMCU_RST_ODL */ - PAD_CFG_GPO(GPP_A12, 0, DEEP), + /* A10 : GPP_A10 ==> NC */ + PAD_NC(GPP_A10, NONE), + /* A11 : GPP_A11 ==> NC */ + PAD_NC(GPP_A11, NONE), + /* A12 : GPP_A12 ==> NC */ + PAD_NC(GPP_A12, NONE), /* A13 : SUSWARN_L */ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1), /* A14 : ESPI_RST_L */ diff --git a/src/mainboard/google/hatch/variants/dratini/gpio.c b/src/mainboard/google/hatch/variants/dratini/gpio.c index 30d56d7..b61748b 100644 --- a/src/mainboard/google/hatch/variants/dratini/gpio.c +++ b/src/mainboard/google/hatch/variants/dratini/gpio.c @@ -19,14 +19,10 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), - /* A10 : NC */ - PAD_NC(GPP_A10, NONE), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* A18 : NC */ PAD_NC(GPP_A18, NONE), /* A19 : NC */ diff --git a/src/mainboard/google/hatch/variants/hatch/gpio.c b/src/mainboard/google/hatch/variants/hatch/gpio.c index 56f587b..a2adf253 100644 --- a/src/mainboard/google/hatch/variants/hatch/gpio.c +++ b/src/mainboard/google/hatch/variants/hatch/gpio.c @@ -19,6 +19,18 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { + /* A0 : SAR0_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A6 : SAR1_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* C13 : EC_PCH_INT_L */ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT)};
diff --git a/src/mainboard/google/hatch/variants/helios/gpio.c b/src/mainboard/google/hatch/variants/helios/gpio.c index 456877c..8663099 100644 --- a/src/mainboard/google/hatch/variants/helios/gpio.c +++ b/src/mainboard/google/hatch/variants/helios/gpio.c @@ -19,10 +19,14 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : RCIN# ==> NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : SERIRQ ==> NC */ - PAD_NC(GPP_A6, NONE), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* A18 : ISH_GP0 ==> NC */ PAD_NC(GPP_A18, NONE), /* A19 : ISH_GP1 ==> NC */ diff --git a/src/mainboard/google/hatch/variants/jinlon/gpio.c b/src/mainboard/google/hatch/variants/jinlon/gpio.c index 4622a72..3cf2c9d 100644 --- a/src/mainboard/google/hatch/variants/jinlon/gpio.c +++ b/src/mainboard/google/hatch/variants/jinlon/gpio.c @@ -19,14 +19,10 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), - /* A10 : NC */ - PAD_NC(GPP_A10, NONE), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* C12 : FPMCU_PCH_BOOT1 */ PAD_CFG_GPO(GPP_C12, 0, DEEP), /* F3 : MEM_STRAP_3 */ diff --git a/src/mainboard/google/hatch/variants/kindred/gpio.c b/src/mainboard/google/hatch/variants/kindred/gpio.c index 9e2d818..3c54243 100644 --- a/src/mainboard/google/hatch/variants/kindred/gpio.c +++ b/src/mainboard/google/hatch/variants/kindred/gpio.c @@ -19,6 +19,18 @@ #include <commonlib/helpers.h>
static const struct pad_config ssd_sku_gpio_table[] = { + /* A0 : SAR0_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A6 : SAR1_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* F3 : MEM_STRAP_3 */ PAD_CFG_GPI(GPP_F3, NONE, PLTRST), /* F10 : MEM_STRAP_2 */ @@ -54,6 +66,18 @@ };
static const struct pad_config emmc_sku_gpio_table[] = { + /* A0 : SAR0_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A6 : SAR1_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* E1 : M2_SSD_PEDET ==> NC */ PAD_NC(GPP_E1, NONE), /* E4 : M2_SSD_PE_WAKE_ODL ==> NC */ @@ -95,6 +119,18 @@ };
static const struct pad_config gpio_table[] = { + /* A0 : SAR0_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A6 : SAR1_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* F3 : MEM_STRAP_3 */ PAD_CFG_GPI(GPP_F3, NONE, PLTRST), /* F10 : MEM_STRAP_2 */ diff --git a/src/mainboard/google/hatch/variants/kohaku/gpio.c b/src/mainboard/google/hatch/variants/kohaku/gpio.c index f52cc27..837abb3 100644 --- a/src/mainboard/google/hatch/variants/kohaku/gpio.c +++ b/src/mainboard/google/hatch/variants/kohaku/gpio.c @@ -19,12 +19,12 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : RCIN# ==> NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : SERIRQ ==> NC */ - PAD_NC(GPP_A6, NONE), - /* A10 : GPP_A10 ==> NC */ - PAD_NC(GPP_A10, NONE), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* A16 : EMR_GARAGE_DET (notification) */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A16, NONE, PLTRST), /* A17 : PIRQA# ==> NC */ diff --git a/src/mainboard/google/hatch/variants/mushu/gpio.c b/src/mainboard/google/hatch/variants/mushu/gpio.c index 56f587b..a2adf253 100644 --- a/src/mainboard/google/hatch/variants/mushu/gpio.c +++ b/src/mainboard/google/hatch/variants/mushu/gpio.c @@ -19,6 +19,18 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { + /* A0 : SAR0_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A0, NONE, PLTRST, LEVEL), + /* A6 : SAR1_INT_ODL */ + PAD_CFG_GPI_INT(GPP_A6, NONE, PLTRST, LEVEL), + /* A8 : PEN_GARAGE_DET_L (wake) */ + PAD_CFG_GPI_SCI(GPP_A8, NONE, DEEP, EDGE_SINGLE, NONE), + /* A10 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* A11 : PCH_SPI_FPMCU_CS_L */ + PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2), + /* A12 : FPMCU_RST_ODL */ + PAD_CFG_GPO(GPP_A12, 0, DEEP), /* C13 : EC_PCH_INT_L */ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT)};
diff --git a/src/mainboard/google/hatch/variants/stryke/gpio.c b/src/mainboard/google/hatch/variants/stryke/gpio.c index 4d27554..4fdbe6a 100644 --- a/src/mainboard/google/hatch/variants/stryke/gpio.c +++ b/src/mainboard/google/hatch/variants/stryke/gpio.c @@ -19,18 +19,6 @@ #include <commonlib/helpers.h>
static const struct pad_config gpio_table[] = { - /* A0 : NC */ - PAD_NC(GPP_A0, NONE), - /* A6 : NC */ - PAD_NC(GPP_A6, NONE), - /* A8 : NC */ - PAD_NC(GPP_A8, NONE), - /* A10 : NC */ - PAD_NC(GPP_A10, NONE), - /* A11 : NC */ - PAD_NC(GPP_A11, NONE), - /* A12 : NC */ - PAD_NC(GPP_A12, NONE), /* A22 : NC */ PAD_NC(GPP_A22, NONE), /* A23 : NC */
-
Edward O'Callaghan (Code Review) -
Furquan Shaikh (Code Review)
-
Kangheui Won (Code Review)