[S] Change in coreboot[main]: soc/intel/xeon_sp: Use MemoryMapDataHob to add high RAM resources

[Shuo Liu (Code Review)]

Attention is currently required from: Alicja Michalska, Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Patrick Rudolph, Shuo Liu, Tim Chu.

Hello Alicja Michalska, Angel Pons, Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84304?usp=email

to look at the new patch set (#2).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: soc/intel/xeon_sp: Use MemoryMapDataHob to add high RAM resources
......................................................................

soc/intel/xeon_sp: Use MemoryMapDataHob to add high RAM resources

On GNR, there are CXL Type-3 memory windows covered under TOHM. The
current 4GB to TOHM DRAM reporting doesn't work on GNR.

Use MemoryMapDataHob to add high RAM resources as a generic
mechanism for GNR and previous generation SoCs.

TEST=Build and boot on intel/archercity CRB
TEST=Build and boot on intel/beechnutcity CRB
(with topic:"Xeon6-Basic-Boot")

Change-Id: Ie5fbc5735704d95c7ad50740ff0e35737afdbd80
Signed-off-by: Shuo Liu 
---
M src/soc/intel/xeon_sp/uncore.c
1 file changed, 18 insertions(+), 18 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/84304/2