Change in coreboot[master]: (TestMe)nb/i945gm: Rewrite sdram_power_management

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40366 )

Change subject: (TestMe)nb/i945gm: Rewrite sdram_power_management
......................................................................

(TestMe)nb/i945gm: Rewrite sdram_power_management

Rewrite sdram_power_management based on vendor.

Change-Id: I06be72370718baacc866b331fa6ff89e2b85c212
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/raminit.c
1 file changed, 22 insertions(+), 23 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/40366/1

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index e56034c..d0dfb13 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -2172,15 +2172,13 @@
    MCHBAR32(C1DRC1) = reg32;

if (CONFIG(NORTHBRIDGE_INTEL_SUBTYPE_I945GM)) {
-		if (i945_silicon_revision() > 1) {
-			/* FIXME bits 5 and 0 only if PCIe graphics is disabled */
-			u16 peg_bits = (1 << 5) | (1 << 0);
+		/* FIXME bits 5 and 0 only if PCIe graphics is disabled */
+		u16 peg_bits = MCHBAR16(UPMC1);
+		peg_bits &= ((1 << 5) | (1 << 0));

+		if (i945_silicon_revision() > 1) {
    		MCHBAR16(UPMC1) = 0x1010 | peg_bits;
    	} else {
-			/* FIXME bits 5 and 0 only if PCIe graphics is disabled */
-			u16 peg_bits = (1 << 5) | (1 << 0);
-
    		/* Rev 0 and 1 */
    		MCHBAR16(UPMC1) = 0x0010 | peg_bits;
    	}
@@ -2193,11 +2191,6 @@

MCHBAR32(UPMC3) = 0x000f06ff;

-	for (i = 0; i < 5; i++) {
-		MCHBAR32(UPMC3) &= ~(1 << 16);
-		MCHBAR32(UPMC3) |= (1 << 16);
-	}
-
    MCHBAR32(GIPMC1) = 0x8000000c;

reg16 = MCHBAR16(CPCTL);
@@ -2279,7 +2272,7 @@
    MCHBAR32(FSBPMC3) &= ~(1 << 13);

reg32 = MCHBAR32(FSBPMC4);
-	reg32 &= ~(3 << 24);
+	reg32 &= ~(1 << 24);
    reg32 |= (2 << 24);
    MCHBAR32(FSBPMC4) = reg32;

@@ -2287,12 +2280,8 @@

MCHBAR32(FSBPMC4) |= (1 << 5);

-	if ((i945_silicon_revision() < 2)) { /* || cpuid() = 0x6e8 */
-		/* stepping 0 and 1 or CPUID 6e8 */
-		MCHBAR32(FSBPMC4) &= ~(1 << 4);
-	} else {
+	if (i945_silicon_revision() > 1)
    	MCHBAR32(FSBPMC4) |= (1 << 4);
-	}

reg8 = pci_read_config8(PCI_DEV(0, 0x0, 0), 0xfc);
    reg8 |= (1 << 4);
@@ -2328,18 +2317,28 @@
 #endif

reg32 = MCHBAR32(PMCFG);
-	reg32 &= ~(3 << 17);
+	reg32 &= ~(1 << 17);
    reg32 |= (2 << 17);
    MCHBAR32(PMCFG) = reg32;

MCHBAR32(PMCFG) |= (1 << 4);

-	reg32 = MCHBAR32(0xc30);
-	reg32 &= 0xffffff00;
-	reg32 |= 0x01;
-	MCHBAR32(0xc30) = reg32;
+	if (i945_silicon_revision() >= 1) {
+		reg32 = MCHBAR32(UPMC4);
+		reg32 &= 0xffffff00;
+		reg32 |= (MCHBAR32(UPMC4) & 1)
+		MCHBAR32(UPMC4) = reg32 | (1 << 0);
+	}

-	MCHBAR32(0xb18) &= ~(1 << 21);
+	reg32 = ~(1 << 21);
+	MCHBAR32(0xb18) &= reg32;
+
+	if (!i945_silicon_revision()) {
+		MCHBAR32(FSBPMC3) |= (1 << 2);
+		MCHBAR32(SLPCTL) |= (1 << 8);
+	}
+
+	MCHBAR32(0xb00) |= (1 << 0);
 }

static void sdram_thermal_management(void)

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40366

to look at the new patch set (#2).

Change subject: (TestMe)nb/i945gm: Rewrite sdram_power_management
......................................................................

(TestMe)nb/i945gm: Rewrite sdram_power_management

Rewrite sdram_power_management based on vendor.
Also reorder sdram_setup_processor_side()

Change-Id: I06be72370718baacc866b331fa6ff89e2b85c212
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/raminit.c
1 file changed, 16 insertions(+), 26 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/40366/2

Change in coreboot[master]: (TestMe)nb/i945gm: Rewrite sdram_power_management()

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/40366

to look at the new patch set (#3).

Change subject: (TestMe)nb/i945gm: Rewrite sdram_power_management()
......................................................................

(TestMe)nb/i945gm: Rewrite sdram_power_management()

Rewrite sdram_power_management based on vendor.

Change-Id: I06be72370718baacc866b331fa6ff89e2b85c212
Signed-off-by: Elyes HAOUAS 
---
M src/northbridge/intel/i945/raminit.c
1 file changed, 3 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/40366/3

Change in coreboot[master]: (TestMe)nb/i945gm: Rewrite sdram_power_management()

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/40366 )

Change subject: (TestMe)nb/i945gm: Rewrite sdram_power_management()
......................................................................

Abandoned