Kapil Porwal has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69680 )
Change subject: soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices ......................................................................
soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices
This patch skips setting D0I3 bit for all HECI devices by FSP.
Port of commit d6da4ef69e4e ("soc/intel/alderlake: Skip setting D0I3 bit for HECI devices").
BUG=none TEST=FSP-S UPD dump suggested `DisableD0I3SettingForHeci` UPD is set to `1`.
Excerpt from google/rex coreboot log: [SPEW ] DisableD0I3SettingForHeci : 0x1
Signed-off-by: Kapil Porwal kapilporwal@google.com Change-Id: I1c3765ce41f192ab5f5ff176e0a2b49b312d18d2 --- M src/soc/intel/meteorlake/fsp_params.c 1 file changed, 25 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/69680/1
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 1323c06..9db3c3d 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -383,6 +383,9 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_meteorlake_config *config) { + /* Skip setting D0I3 bit for all HECI devices */ + s_cfg->DisableD0I3SettingForHeci = 1; + s_cfg->Hwp = 1; s_cfg->Cx = 1; s_cfg->PsOnEnable = 1;