Tommie Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
mb/google/octopus/variants/phaser: Disable xHCI compliance mode
BRANCH=octopus BUG=NONE TEST=Verified usb operation successfully.
Signed-off-by: tong.lin tong.lin@bitland.corp-partner.google.com Change-Id: I3e6ab6ec0c4865cf2467da900f13d18468ff356f --- M src/mainboard/google/octopus/variants/phaser/overridetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/39968/1
diff --git a/src/mainboard/google/octopus/variants/phaser/overridetree.cb b/src/mainboard/google/octopus/variants/phaser/overridetree.cb index 625c2a6..3ae365c 100644 --- a/src/mainboard/google/octopus/variants/phaser/overridetree.cb +++ b/src/mainboard/google/octopus/variants/phaser/overridetree.cb @@ -173,4 +173,7 @@ end end # - I2C 7 end + + # Disable compliance mode + register "DisableComplianceMode" = "1" end
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG@8 PS1, Line 8: Please mention, why the mode is disabled.
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39968
to look at the new patch set (#2).
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
mb/google/octopus/variants/phaser: Disable xHCI compliance mode
Some usb devices exhibits signal loss which causes xHCI entering compliance mode. The resolution is to disable xHCI compliance mode.
BRANCH=octopus BUG=b:149723583 TEST=Verified usb operation successfully.
Signed-off-by: tong.lin tong.lin@bitland.corp-partner.google.com Change-Id: I3e6ab6ec0c4865cf2467da900f13d18468ff356f --- M src/mainboard/google/octopus/variants/phaser/overridetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/39968/2
Tommie Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG@8 PS1, Line 8:
Please mention, why the mode is disabled.
Dear Paul, According to the state of dongle to analyze in this issue: 149723583, due to LFPS timeout leading into compliance mode, but the root cause may still need us to use USB Protocol Analyzer to debug. At present, Intel provides a workaround reference, but we need to consider whether to use this CL.
Tommie Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 2:
(1 comment)
This change is ready for review.
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG@10 PS1, Line 10: BUG=NONE
Add the bug?
Yeah, I have added the bug in Patchset 2.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG@8 PS1, Line 8:
Dear Paul, […]
As the bug is not public, please add a summary (similar to your comment) to the commit message.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 2: Code-Review+1
(5 comments)
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG@9 PS2, Line 9: usb USB
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG@9 PS2, Line 9: entering to enter
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG@9 PS2, Line 9: exhibits exhibit
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG@14 PS2, Line 14: usb USB
https://review.coreboot.org/c/coreboot/+/39968/2/src/mainboard/google/octopu... File src/mainboard/google/octopus/variants/phaser/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/39968/2/src/mainboard/google/octopu... PS2, Line 177: Disable compliance mode Mention that this is for xHCI?
# Disable xHCI compliance mode
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 2: Code-Review+1
looks good to me and please address reviewer's comments. Thanks.
Hello build bot (Jenkins), Furquan Shaikh, Justin TerAvest, Angel Pons, Marco Chen, Wuxy -, Peichao Li, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39968
to look at the new patch set (#3).
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
mb/google/octopus/variants/phaser: Disable xHCI compliance mode
Since the first LFPS timeout causes xHCI to enter compliance mode, the SS hub cannot be enumerated. The resolution is to disable xHCI compliance mode.
BRANCH=octopus BUG=b:149723583 TEST=Verified USB operation successfully.
Signed-off-by: tong.lin tong.lin@bitland.corp-partner.google.com Change-Id: I3e6ab6ec0c4865cf2467da900f13d18468ff356f --- M src/mainboard/google/octopus/variants/phaser/overridetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/39968/3
Tommie Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 3:
(7 comments)
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG@8 PS1, Line 8:
As the bug is not public, please add a summary (similar to your comment) to the commit message.
Done
https://review.coreboot.org/c/coreboot/+/39968/1//COMMIT_MSG@10 PS1, Line 10: BUG=NONE
Yeah, I have added the bug in Patchset 2.
Done
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG@9 PS2, Line 9: usb
USB
Done
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG@9 PS2, Line 9: exhibits
exhibit
Done
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG@9 PS2, Line 9: entering
to enter
Done
https://review.coreboot.org/c/coreboot/+/39968/2//COMMIT_MSG@14 PS2, Line 14: usb
USB
Done
https://review.coreboot.org/c/coreboot/+/39968/2/src/mainboard/google/octopu... File src/mainboard/google/octopus/variants/phaser/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/39968/2/src/mainboard/google/octopu... PS2, Line 177: Disable compliance mode
Mention that this is for xHCI? […]
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 3: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 3: Code-Review+2
Thanks!
Marco Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 3: Code-Review+2
Tommie Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 3:
Dear Furquan,
Please kindly cherry-pick it into chromium master branch. Thanks a lot!
Best regards
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
mb/google/octopus/variants/phaser: Disable xHCI compliance mode
Since the first LFPS timeout causes xHCI to enter compliance mode, the SS hub cannot be enumerated. The resolution is to disable xHCI compliance mode.
BRANCH=octopus BUG=b:149723583 TEST=Verified USB operation successfully.
Signed-off-by: tong.lin tong.lin@bitland.corp-partner.google.com Change-Id: I3e6ab6ec0c4865cf2467da900f13d18468ff356f Reviewed-on: https://review.coreboot.org/c/coreboot/+/39968 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Marco Chen marcochen@google.com --- M src/mainboard/google/octopus/variants/phaser/overridetree.cb 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Marco Chen: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/google/octopus/variants/phaser/overridetree.cb b/src/mainboard/google/octopus/variants/phaser/overridetree.cb index 625c2a6..b80d031 100644 --- a/src/mainboard/google/octopus/variants/phaser/overridetree.cb +++ b/src/mainboard/google/octopus/variants/phaser/overridetree.cb @@ -173,4 +173,7 @@ end end # - I2C 7 end + + # Disable xHCI compliance mode + register "DisableComplianceMode" = "1" end
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39968 )
Change subject: mb/google/octopus/variants/phaser: Disable xHCI compliance mode ......................................................................
Patch Set 4:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/2144 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/2143 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/2142
Please note: This test is under development and might not be accurate at all!