[XS] Change in coreboot[main]: mb/google/rauru: Add pwrsel init in romstage

[Jarried Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu.

Jarried Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85620?usp=email )

Change subject: mb/google/rauru: Add pwrsel init in romstage
......................................................................

mb/google/rauru: Add pwrsel init in romstage

BUG=b:317009620
TEST=build pass, reg set ok, log show:
PWR_SEL = 0x0

Change-Id: I37c0fb905f99491ca99f04bc5bfa6abfb1c01059
Signed-off-by: Jarried Lin 
---
M src/mainboard/google/rauru/romstage.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/85620/1

diff --git a/src/mainboard/google/rauru/romstage.c b/src/mainboard/google/rauru/romstage.c
index ebeedb8..b6f0d4e 100644
--- a/src/mainboard/google/rauru/romstage.c
+++ b/src/mainboard/google/rauru/romstage.c
@@ -3,11 +3,13 @@
 #include <arch/stages.h>
 #include <soc/emi.h>
 #include <soc/irq2axi.h>
+#include <soc/mtk_pwrsel.h>
 #include <soc/pcie.h>

void platform_romstage_main(void)
 {
    irq2axi_disable();
+	pwrsel_init();
    mtk_dram_init();

if (CONFIG(PCI))