[XS] Change in coreboot[main]: soc/intel/cml, pci_ids: Fix ID for Comet Lake-H GT2

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83708?usp=email )

Change subject: soc/intel/cml, pci_ids: Fix ID for Comet Lake-H GT2
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soc/intel/cml, pci_ids: Fix ID for Comet Lake-H GT2

According to the Intel GPU list[1], 0x3E9B is DID of "Intel UHD Graphics
630" for the Coffee Lake processor family and has already been added to
the pci_ids.h as PCI_IDE_INTEL_CFL_H_GT2.

At the same time, the real PCI DID for Comet Lake-H GT2 is 0x9BC2 [1],
which is missing in the file.

[1] https://web.archive.org/web/20240731152818/https://
dgpu-docs.intel.com/devices/hardware-table.html

Change-Id: Iacab0a03388af3f6fd5d78a597580037889e8ef2
Signed-off-by: Maxim Polyakov 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83708
Tested-by: build bot (Jenkins) 
Reviewed-by: Martin L Roth 
---
M src/include/device/pci_ids.h
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Martin L Roth: Looks good to me, approved

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 54fe0c1..24799b8 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -4193,7 +4193,7 @@
 #define PCI_DID_INTEL_CML_GT2_H_2			0x9B42
 #define PCI_DID_INTEL_CML_GT2_S_G0			0x9BC8
 #define PCI_DID_INTEL_CML_GT2_S_P0			0x9BC5
-#define PCI_DID_INTEL_CML_GT2_H_R0			0x3E9B
+#define PCI_DID_INTEL_CML_GT2_H_R0			0x9BC2
 #define PCI_DID_INTEL_CML_GT2_H_R1			0x9BC4
 #define PCI_DID_INTEL_TGL_GT1				0x9A60
 #define PCI_DID_INTEL_TGL_GT2_UY			0x9A49