[S] Change in coreboot[master]: payloads/external/seabios: Scan all PCI domains on Xeon-SP platforms - coreboot-gerrit

10 Jun 2023


      Attention is currently required from: Christian Walter, Nico Huber.
Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49461?usp=email )
Change subject: payloads/external/seabios: Scan all PCI domains on Xeon-SP platforms
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Patch Set 2: Code-Review+2
(1 comment)
File payloads/external/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/49461/comment/7f375e87_951c6adf :
PS2, Line 118: 255
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On my Xeon-SP there are devices on bus 0xff. […]
Given that this is not enabled on Thinkpads, it is somewhat irrelevant. If you want to add support for your Thinkpad, this should be done in an incremental patch.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1a99e1b9b6ea77fede6ed8239016bd92c5291c63
Gerrit-Change-Number: 49461
Gerrit-PatchSet: 2
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