[XS] Change in coreboot[main]: soc/intel/alderlake: Add support for PCIe speed setting

[David Wu (Code Review)]

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik.

David Wu has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/85519?usp=email )

Change subject: soc/intel/alderlake: Add support for PCIe speed setting
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Set Ready For Review