Attention is currently required from: Paul Menzel, Subrata Banik.
Saurabh Mishra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81847?usp=email )
Change subject: soc/intel/lunarlake: Support stepping A0_2 ......................................................................
Patch Set 3:
(7 comments)
Commit Message:
PS2:
Just reading the commit message, I would have thought the diff to be different. […]
ACK.
https://review.coreboot.org/c/coreboot/+/81847/comment/65f610c2_13ccac2a : PS2, Line 7: soc/intel/{common, lunarlake}: Add support for new MCH
The prefix does not need to be the path. Maybe: […]
ACK.
https://review.coreboot.org/c/coreboot/+/81847/comment/e5d58c9b_8d3c6883 : PS2, Line 10: (ID:0x6410)
I’d write: … with id 0x640 […]
Done
https://review.coreboot.org/c/coreboot/+/81847/comment/8cb5fe71_10f971db : PS2, Line 10: The patch adds
“The patch” is redundant [1]. Just use the imperative mood: […]
ACK.
https://review.coreboot.org/c/coreboot/+/81847/comment/f233c9b8_1a1eb884 : PS2, Line 11: Add new CPU ID (ID:0xb06d1)
Add new CPU id 0xb06d1
ACK.
https://review.coreboot.org/c/coreboot/+/81847/comment/97d6153c_7d410f6e : PS2, Line 16: TEST=Build and boot the system having MCH ID:0x6410.
Which log line is that?
Updated.
File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/81847/comment/bf42278b_611aded1 : PS2, Line 4292: #define PCI_DID_INTEL_LNL_M_ID_1 0x6410
Name the above …1, and this one _2 for alignment reasons?
ACK.