wang qii has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31519
Change subject: mediatek/mt8183: Modify I2C source clock ......................................................................
mediatek/mt8183: Modify I2C source clock
This patch change i2c source clock to TOPCKGEN.
BUG=b:80501386 BRANCH=none TEST=Boot correctly on kukui.
Change-Id: I49e0acda22dba449d0873a95ba5fae79a9cef569 Signed-off-by: Qii Wang qii.wang@mediatek.com --- M src/soc/mediatek/mt8183/pll.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/31519/1
diff --git a/src/soc/mediatek/mt8183/pll.c b/src/soc/mediatek/mt8183/pll.c index 799b6ca..45cf989 100644 --- a/src/soc/mediatek/mt8183/pll.c +++ b/src/soc/mediatek/mt8183/pll.c @@ -345,6 +345,9 @@ /* enable infrasys DCM */ setbits_le32(&mt8183_infracfg->infra_bus_dcm_ctrl, 0x3 << 21);
+ /* i2c module clock source selection */ + setbits_le32(&mt8183_infracfg->module_clk_sel, 0x1 << 11); + /* * TOP CLKMUX -- DO NOT CHANGE WITHOUT ADJUSTING <soc/pll.h> CONSTANTS! */
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31519 )
Change subject: mediatek/mt8183: Modify I2C source clock ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31519/1/src/soc/mediatek/mt8183/pll.c File src/soc/mediatek/mt8183/pll.c:
https://review.coreboot.org/#/c/31519/1/src/soc/mediatek/mt8183/pll.c@349 PS1, Line 349: 0x1 << 11 can we revise the magic numbers here? for example name 0x1 as something with TOPCKGEN
wang qii has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31519 )
Change subject: mediatek/mt8183: Modify I2C source clock ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31519/1/src/soc/mediatek/mt8183/pll.c File src/soc/mediatek/mt8183/pll.c:
https://review.coreboot.org/#/c/31519/1/src/soc/mediatek/mt8183/pll.c@349 PS1, Line 349: 0x1 << 11
can we revise the magic numbers here? for example name 0x1 as something with TOPCKGEN
I just modeled the above code. If you think a macro definition is better, I will modify it
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31519 )
Change subject: mediatek/mt8183: Modify I2C source clock ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/31519/1/src/soc/mediatek/mt8183/pll.c File src/soc/mediatek/mt8183/pll.c:
https://review.coreboot.org/#/c/31519/1/src/soc/mediatek/mt8183/pll.c@349 PS1, Line 349: 0x1 << 11
I just modeled the above code. […]
Please modify that, although not necessary to be macro def. It can be anything that in code: simply explain the value in comment or macro def or enum.
Hello Julius Werner, You-Cheng Syu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31519
to look at the new patch set (#2).
Change subject: mediatek/mt8183: Modify I2C source clock ......................................................................
mediatek/mt8183: Modify I2C source clock
This patch change i2c source clock to TOPCKGEN.
BUG=b:80501386 BRANCH=none TEST=Boot correctly on kukui.
Change-Id: I49e0acda22dba449d0873a95ba5fae79a9cef569 Signed-off-by: Qii Wang qii.wang@mediatek.com --- M src/soc/mediatek/mt8183/pll.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/31519/2
Hello Julius Werner, You-Cheng Syu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31519
to look at the new patch set (#3).
Change subject: mediatek/mt8183: Modify I2C source clock ......................................................................
mediatek/mt8183: Modify I2C source clock
This patch change i2c source clock to TOPCKGEN.
BUG=b:80501386 BRANCH=none TEST=Boot correctly on kukui.
Change-Id: I49e0acda22dba449d0873a95ba5fae79a9cef569 Signed-off-by: Qii Wang qii.wang@mediatek.com --- M src/soc/mediatek/mt8183/pll.c 1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/31519/3
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31519 )
Change subject: mediatek/mt8183: Modify I2C source clock ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31519 )
Change subject: mediatek/mt8183: Modify I2C source clock ......................................................................
mediatek/mt8183: Modify I2C source clock
This patch change i2c source clock to TOPCKGEN.
BUG=b:80501386 BRANCH=none TEST=Boot correctly on kukui.
Change-Id: I49e0acda22dba449d0873a95ba5fae79a9cef569 Signed-off-by: Qii Wang qii.wang@mediatek.com Reviewed-on: https://review.coreboot.org/c/31519 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Hung-Te Lin hungte@chromium.org --- M src/soc/mediatek/mt8183/pll.c 1 file changed, 3 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8183/pll.c b/src/soc/mediatek/mt8183/pll.c index 799b6ca..1967025 100644 --- a/src/soc/mediatek/mt8183/pll.c +++ b/src/soc/mediatek/mt8183/pll.c @@ -345,6 +345,9 @@ /* enable infrasys DCM */ setbits_le32(&mt8183_infracfg->infra_bus_dcm_ctrl, 0x3 << 21);
+ /* enable [11] for change i2c module source clock to TOPCKGEN */ + setbits_le32(&mt8183_infracfg->module_clk_sel, 0x1 << 11); + /* * TOP CLKMUX -- DO NOT CHANGE WITHOUT ADJUSTING <soc/pll.h> CONSTANTS! */
-
Hung-Te Lin (Code Review) -
Patrick Georgi (Code Review)
-
wang qii (Code Review)